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103 lines
3.3 KiB
C
103 lines
3.3 KiB
C
/*
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* Copyright 2022, NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_common.h"
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#include "fsl_reset.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.reset"
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#endif
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/*******************************************************************************
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* Variables
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******************************************************************************/
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*******************************************************************************
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* Code
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******************************************************************************/
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#if (defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0))
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/*!
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* brief Assert reset to peripheral.
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*
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* Asserts reset signal to specified peripheral module.
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*
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* param peripheral Assert reset to this peripheral. The enum argument contains encoding of reset register
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* and reset bit position in the reset register.
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*/
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void RESET_SetPeripheralReset(reset_ip_name_t peripheral)
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{
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const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16;
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const uint32_t bitPos = ((uint32_t)peripheral & 0x0000FFFFu);
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const uint32_t bitMask = 1UL << bitPos;
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volatile uint32_t *pResetCtrl;
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assert(bitPos < 32u);
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/* reset register is in SYSCON */
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/* set bit */
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SYSCON->PRESETCTRLSET[regIndex] = bitMask;
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/* wait until it reads 0b1 */
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pResetCtrl = &(SYSCON->PRESETCTRL0);
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while (0u == ((uint32_t)((volatile uint32_t *)pResetCtrl)[regIndex] & bitMask))
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{
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}
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}
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/*!
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* brief Clear reset to peripheral.
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*
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* Clears reset signal to specified peripheral module, allows it to operate.
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*
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* param peripheral Clear reset to this peripheral. The enum argument contains encoding of reset register
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* and reset bit position in the reset register.
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*/
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void RESET_ClearPeripheralReset(reset_ip_name_t peripheral)
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{
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const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16;
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const uint32_t bitPos = ((uint32_t)peripheral & 0x0000FFFFu);
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const uint32_t bitMask = 1UL << bitPos;
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volatile uint32_t *pResetCtrl;
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assert(bitPos < 32u);
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/* reset register is in SYSCON */
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/* clear bit */
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SYSCON->PRESETCTRLCLR[regIndex] = bitMask;
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/* wait until it reads 0b0 */
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pResetCtrl = &(SYSCON->PRESETCTRL0);
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while (bitMask == ((uint32_t)((volatile uint32_t *)pResetCtrl)[regIndex] & bitMask))
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{
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}
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}
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/*!
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* brief Reset peripheral module.
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*
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* Reset peripheral module.
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*
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* param peripheral Peripheral to reset. The enum argument contains encoding of reset register
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* and reset bit position in the reset register.
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*/
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void RESET_PeripheralReset(reset_ip_name_t peripheral)
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{
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RESET_SetPeripheralReset(peripheral);
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RESET_ClearPeripheralReset(peripheral);
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}
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#endif /* FSL_FEATURE_SOC_SYSCON_COUNT || FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT */
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