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15 lines
558 B
C
15 lines
558 B
C
#pragma once
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struct mip_driver_tm4c {
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// MDC clock divider. MDC clock is derived from SYSCLK, must not exceed 2.5MHz
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// SYSCLK range DIVIDER mdc_cr VALUE
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// -------------------------------------
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// -1 <-- tell driver to guess the value
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// 60-100 MHz SYSCLK/42 0
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// 100-150 MHz SYSCLK/62 1 <-- value for EK-TM4C129* on max speed
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// 20-35 MHz SYSCLK/16 2
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// 35-60 MHz SYSCLK/26 3
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// 0x4-0xF Reserved
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int mdc_cr; // Valid values: -1, 0, 1, 2, 3
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};
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