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Rename driver data structure
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21d3678fa7
commit
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@ -70,7 +70,7 @@ int main(void) {
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// Initialise Mongoose network stack
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// Initialise Mongoose network stack
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// Specify MAC address, and IP/mask/GW in network byte order for static
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// Specify MAC address, and IP/mask/GW in network byte order for static
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// IP configuration. If IP/mask/GW are unset, DHCP is going to be used
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// IP configuration. If IP/mask/GW are unset, DHCP is going to be used
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struct mip_driver_stm32 driver_data = {.mdc_cr = 4}; // See driver_stm32.h
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struct mip_driver_stm32_data driver_data = {.mdc_cr = 4}; // See driver_stm32.h
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struct mip_if mif = {
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struct mip_if mif = {
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.mac = {2, 0, 1, 2, 3, 5},
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.mac = {2, 0, 1, 2, 3, 5},
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.driver = &mip_driver_stm32,
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.driver = &mip_driver_stm32,
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@ -48,7 +48,7 @@ static void server(void *args) {
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// IP configuration. If IP/mask/GW are unset, DHCP is going to be used
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// IP configuration. If IP/mask/GW are unset, DHCP is going to be used
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MG_INFO(("Initializing Ethernet driver"));
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MG_INFO(("Initializing Ethernet driver"));
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ethernet_init();
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ethernet_init();
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struct mip_driver_stm32 driver_data = {.mdc_cr = 4}; // See driver_stm32.h
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struct mip_driver_stm32_data driver_data = {.mdc_cr = 4}; // See driver_stm32.h
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struct mip_if mif = {
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struct mip_if mif = {
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.mac = {2, 0, 1, 2, 3, 5},
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.mac = {2, 0, 1, 2, 3, 5},
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.driver = &mip_driver_stm32,
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.driver = &mip_driver_stm32,
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@ -70,7 +70,7 @@ int main(void) {
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// Initialise Mongoose network stack
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// Initialise Mongoose network stack
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// Specify MAC address, and IP/mask/GW in network byte order for static
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// Specify MAC address, and IP/mask/GW in network byte order for static
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// IP configuration. If IP/mask/GW are unset, DHCP is going to be used
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// IP configuration. If IP/mask/GW are unset, DHCP is going to be used
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struct mip_driver_stm32 driver_data = {.mdc_cr = 4}; // See driver_stm32.h
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struct mip_driver_stm32_data driver_data = {.mdc_cr = 4}; // See driver_stm32.h
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struct mip_if mif = {
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struct mip_if mif = {
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.mac = {2, 0, 1, 2, 3, 5},
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.mac = {2, 0, 1, 2, 3, 5},
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.driver = &mip_driver_stm32,
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.driver = &mip_driver_stm32,
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@ -47,7 +47,7 @@ static void server(void *args) {
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// IP configuration. If IP/mask/GW are unset, DHCP is going to be used
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// IP configuration. If IP/mask/GW are unset, DHCP is going to be used
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MG_INFO(("Initializing Ethernet driver"));
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MG_INFO(("Initializing Ethernet driver"));
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ethernet_init();
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ethernet_init();
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struct mip_driver_stm32 driver_data = {.mdc_cr = 4}; // See driver_stm32.h
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struct mip_driver_stm32_data driver_data = {.mdc_cr = 4}; // See driver_stm32.h
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struct mip_if mif = {
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struct mip_if mif = {
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.mac = {2, 0, 1, 2, 3, 5},
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.mac = {2, 0, 1, 2, 3, 5},
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.driver = &mip_driver_stm32,
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.driver = &mip_driver_stm32,
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@ -102,7 +102,7 @@ static int guess_mdc_cr(void) {
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}
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}
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static bool mip_driver_stm32_init(struct mip_if *ifp) {
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static bool mip_driver_stm32_init(struct mip_if *ifp) {
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struct mip_driver_stm32 *d = (struct mip_driver_stm32 *) ifp->driver_data;
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struct mip_driver_stm32_data *d = (struct mip_driver_stm32_data *) ifp->driver_data;
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s_ifp = ifp;
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s_ifp = ifp;
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// Init RX descriptors
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// Init RX descriptors
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@ -1,6 +1,6 @@
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#pragma once
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#pragma once
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struct mip_driver_stm32 {
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struct mip_driver_stm32_data {
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// MDC clock divider. MDC clock is derived from HCLK, must not exceed 2.5MHz
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// MDC clock divider. MDC clock is derived from HCLK, must not exceed 2.5MHz
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// HCLK range DIVIDER mdc_cr VALUE
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// HCLK range DIVIDER mdc_cr VALUE
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// -------------------------------------
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// -------------------------------------
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@ -6029,7 +6029,7 @@ static int guess_mdc_cr(void) {
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}
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}
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static bool mip_driver_stm32_init(struct mip_if *ifp) {
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static bool mip_driver_stm32_init(struct mip_if *ifp) {
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struct mip_driver_stm32 *d = (struct mip_driver_stm32 *) ifp->driver_data;
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struct mip_driver_stm32_data *d = (struct mip_driver_stm32_data *) ifp->driver_data;
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s_ifp = ifp;
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s_ifp = ifp;
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// Init RX descriptors
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// Init RX descriptors
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@ -1504,7 +1504,7 @@ void qp_init(void);
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#endif
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#endif
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struct mip_driver_stm32 {
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struct mip_driver_stm32_data {
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// MDC clock divider. MDC clock is derived from HCLK, must not exceed 2.5MHz
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// MDC clock divider. MDC clock is derived from HCLK, must not exceed 2.5MHz
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// HCLK range DIVIDER mdc_cr VALUE
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// HCLK range DIVIDER mdc_cr VALUE
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// -------------------------------------
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// -------------------------------------
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