diff --git a/mip/driver_stm32.c b/mip/driver_stm32.c
index 561ad028..619ada3d 100644
--- a/mip/driver_stm32.c
+++ b/mip/driver_stm32.c
@@ -131,7 +131,7 @@ static bool mip_driver_stm32_init(uint8_t *mac, void *userdata) {
   // ETH->DMABMR = BIT(13) | BIT(16) | BIT(22) | BIT(23) | BIT(25);
   ETH->MACIMR = BIT(3) | BIT(9);                    // Mask timestamp & PMT IT
   ETH->MACFCR = BIT(7);                             // Disable zero quarta pause
-  ETH->MACFFR = BIT(31);                            // Receive all
+  // ETH->MACFFR = BIT(31);                            // Receive all
   eth_write_phy(PHY_ADDR, PHY_BCR, BIT(15));        // Reset PHY
   eth_write_phy(PHY_ADDR, PHY_BCR, BIT(12));        // Set autonegotiation
   ETH->DMARDLAR = (uint32_t) (uintptr_t) s_rxdesc;  // RX descriptors
diff --git a/mip/driver_tm4c.c b/mip/driver_tm4c.c
index e1086a95..e7b11db2 100644
--- a/mip/driver_tm4c.c
+++ b/mip/driver_tm4c.c
@@ -145,7 +145,7 @@ static bool mip_driver_tm4c_init(uint8_t *mac, void *userdata) {
   // EMAC->EMACDMABUSMOD = BIT(13) | BIT(16) | BIT(22) | BIT(23) | BIT(25);
   EMAC->EMACIM = BIT(3) | BIT(9);  // Mask timestamp & PMT IT
   EMAC->EMACFLOWCTL = BIT(7);      // Disable zero-quanta pause
-  EMAC->EMACFRAMEFLTR = BIT(31);   // Receive all
+  // EMAC->EMACFRAMEFLTR = BIT(31);   // Receive all
   // EMAC->EMACPC defaults to internal PHY (EPHY) in MMI mode
   emac_write_phy(EPHY_ADDR, EPHYBMCR, BIT(15));  // Reset internal PHY (EPHY)
   emac_write_phy(EPHY_ADDR, EPHYBMCR, BIT(12));  // Set autonegotiation
diff --git a/mongoose.c b/mongoose.c
index b110acf7..c73c0179 100644
--- a/mongoose.c
+++ b/mongoose.c
@@ -6116,7 +6116,7 @@ static bool mip_driver_stm32_init(uint8_t *mac, void *userdata) {
   // ETH->DMABMR = BIT(13) | BIT(16) | BIT(22) | BIT(23) | BIT(25);
   ETH->MACIMR = BIT(3) | BIT(9);                    // Mask timestamp & PMT IT
   ETH->MACFCR = BIT(7);                             // Disable zero quarta pause
-  ETH->MACFFR = BIT(31);                            // Receive all
+  // ETH->MACFFR = BIT(31);                            // Receive all
   eth_write_phy(PHY_ADDR, PHY_BCR, BIT(15));        // Reset PHY
   eth_write_phy(PHY_ADDR, PHY_BCR, BIT(12));        // Set autonegotiation
   ETH->DMARDLAR = (uint32_t) (uintptr_t) s_rxdesc;  // RX descriptors
@@ -6339,7 +6339,7 @@ static bool mip_driver_tm4c_init(uint8_t *mac, void *userdata) {
   // EMAC->EMACDMABUSMOD = BIT(13) | BIT(16) | BIT(22) | BIT(23) | BIT(25);
   EMAC->EMACIM = BIT(3) | BIT(9);  // Mask timestamp & PMT IT
   EMAC->EMACFLOWCTL = BIT(7);      // Disable zero-quanta pause
-  EMAC->EMACFRAMEFLTR = BIT(31);   // Receive all
+  // EMAC->EMACFRAMEFLTR = BIT(31);   // Receive all
   // EMAC->EMACPC defaults to internal PHY (EPHY) in MMI mode
   emac_write_phy(EPHY_ADDR, EPHYBMCR, BIT(15));  // Reset internal PHY (EPHY)
   emac_write_phy(EPHY_ADDR, EPHYBMCR, BIT(12));  // Set autonegotiation