diff --git a/examples/stm32/nucleo-f429zi-freertos-mip/main.c b/examples/stm32/nucleo-f429zi-freertos-mip/main.c index 8e3588eb..d7f8b26d 100644 --- a/examples/stm32/nucleo-f429zi-freertos-mip/main.c +++ b/examples/stm32/nucleo-f429zi-freertos-mip/main.c @@ -48,7 +48,8 @@ static void server(void *args) { // IP configuration. If IP/mask/GW are unset, DHCP is going to be used MG_INFO(("Initializing Ethernet driver")); ethernet_init(); - struct mip_driver_stm32_data driver_data = {.mdc_cr = 4}; // See driver_stm32.h + struct mip_driver_stm32_data driver_data = {.mdc_cr = + 4}; // See driver_stm32.h struct mip_if mif = { .mac = {2, 0, 1, 2, 3, 5}, .driver = &mip_driver_stm32, @@ -74,9 +75,9 @@ static void blinker(void *args) { } int main(void) { - clock_init(); // Set clock to max of 180 MHz + clock_init(); // Set clock to max of 180 MHz systick_init(SYS_FREQUENCY / 1000); // Tick every 1 ms - uart_init(UART3, 115200); // Initialise UART + uart_init(UART_DEBUG, 115200); // Initialise UART xTaskCreate(blinker, "blinker", 128, ":)", configMAX_PRIORITIES - 1, NULL); xTaskCreate(server, "server", 2048, 0, configMAX_PRIORITIES - 1, NULL); vTaskStartScheduler(); // This blocks diff --git a/examples/stm32/nucleo-f429zi-freertos-mip/mcu.h b/examples/stm32/nucleo-f429zi-freertos-mip/mcu.h index 2b90a2db..8cc467cd 100644 --- a/examples/stm32/nucleo-f429zi-freertos-mip/mcu.h +++ b/examples/stm32/nucleo-f429zi-freertos-mip/mcu.h @@ -101,6 +101,10 @@ static inline void gpio_toggle(uint16_t pin) { #define UART2 USART2 #define UART3 USART3 +#ifndef UART_DEBUG +#define UART_DEBUG USART3 +#endif + static inline void uart_init(USART_TypeDef *uart, unsigned long baud) { // https://www.st.com/resource/en/datasheet/stm32f429zi.pdf uint8_t af = 7; // Alternate function diff --git a/examples/stm32/nucleo-f429zi-freertos-mip/syscalls.c b/examples/stm32/nucleo-f429zi-freertos-mip/syscalls.c index 31b272f2..656d3954 100644 --- a/examples/stm32/nucleo-f429zi-freertos-mip/syscalls.c +++ b/examples/stm32/nucleo-f429zi-freertos-mip/syscalls.c @@ -1,14 +1,11 @@ +#include + #include "mcu.h" -int _write(int fd, char *ptr, int len) { - (void) fd, (void) ptr, (void) len; - if (fd == 1) uart_write_buf(UART3, ptr, (size_t) len); - return len; -} - int _fstat(int fd, struct stat *st) { - (void) fd, (void) st; - return -1; + if (fd < 0) return -1; + st->st_mode = S_IFCHR; + return 0; } void *_sbrk(int incr) { @@ -21,6 +18,11 @@ void *_sbrk(int incr) { return prev_heap; } +int _open(const char *path) { + (void) path; + return -1; +} + int _close(int fd) { (void) fd; return -1; @@ -31,12 +33,53 @@ int _isatty(int fd) { return 1; } +int _lseek(int fd, int ptr, int dir) { + (void) fd, (void) ptr, (void) dir; + return 0; +} + +void _exit(int status) { + (void) status; + for (;;) asm volatile("BKPT #0"); +} + +void _kill(int pid, int sig) { + (void) pid, (void) sig; +} + +int _getpid(void) { + return -1; +} + +int _write(int fd, char *ptr, int len) { + (void) fd, (void) ptr, (void) len; + if (fd == 1) uart_write_buf(UART_DEBUG, ptr, (size_t) len); + return -1; +} + int _read(int fd, char *ptr, int len) { (void) fd, (void) ptr, (void) len; return -1; } -int _lseek(int fd, int ptr, int dir) { - (void) fd, (void) ptr, (void) dir; - return 0; +int _link(const char *a, const char *b) { + (void) a, (void) b; + return -1; } + +int _unlink(const char *a) { + (void) a; + return -1; +} + +int _stat(const char *path, struct stat *st) { + (void) path, (void) st; + return -1; +} + +int mkdir(const char *path, mode_t mode) { + (void) path, (void) mode; + return -1; +} + +void _init(void) {} diff --git a/examples/stm32/nucleo-f746zg-baremetal/Makefile b/examples/stm32/nucleo-f746zg-baremetal/Makefile index 3bf3a4a0..071611e3 100644 --- a/examples/stm32/nucleo-f746zg-baremetal/Makefile +++ b/examples/stm32/nucleo-f746zg-baremetal/Makefile @@ -1,68 +1,39 @@ -# Download CMSIS header files from Github on demand -CMSIS_CORE_VERSION ?= 5.9.0 # ARM Cortex-M definitions -CMSIS_CORE_REPO ?= https://github.com/ARM-software/CMSIS_5 -CMSIS_DEVICE_VERSION ?= v1.2.8 # ST MCU peripheral definitions -CMSIS_DEVICE_REPO ?= https://github.com/STMicroelectronics/cmsis_device_f7 - CFLAGS = -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion CFLAGS += -Wformat-truncation -fno-common -Wconversion -Wno-sign-conversion CFLAGS += -g3 -Os -ffunction-sections -fdata-sections -CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include -Icmsis_device_f7/Include +CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include -Icmsis_f7/Include CFLAGS += -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 LDFLAGS ?= -Tlink.ld -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map SOURCES = main.c syscalls.c sysinit.c +SOURCES += cmsis_f7/Source/Templates/gcc/startup_stm32f746xx.s # ST startup file. Compiler-dependent! -# Using ST-provided startup file. NOTE: this is compiler-dependant -SOURCES += cmsis_device_f7/Source/Templates/gcc/startup_stm32f746xx.s +# Mongoose-specific source code files and build options. See https://mongoose.ws/documentation/#build-options +SOURCES += ../../../mongoose.c ../../device-dashboard/net.c ../../device-dashboard/packed_fs.c +CFLAGS += -I../../.. -DMG_ARCH=MG_ARCH_NEWLIB -DMG_ENABLE_CUSTOM_MILLIS=1 +CFLAGS += -DMG_ENABLE_CUSTOM_RANDOM=1 -DMG_ENABLE_MIP=1 -DMG_ENABLE_PACKED_FS=1 $(CFLAGS_EXTRA) -# Mongoose-specific build flags and source code files -# Build options reference: https://mongoose.ws/documentation/#build-options -SOURCES += ../../../mongoose.c -SOURCES += ../../device-dashboard/net.c -SOURCES += ../../device-dashboard/packed_fs.c - -CFLAGS += -I../../.. -CFLAGS += -DMG_ARCH=MG_ARCH_NEWLIB -CFLAGS += -DMG_ENABLE_CUSTOM_MILLIS=1 -CFLAGS += -DMG_ENABLE_CUSTOM_RANDOM=1 -CFLAGS += -DMG_ENABLE_MIP=1 -CFLAGS += -DMG_ENABLE_PACKED_FS=1 -CFLAGS += $(CFLAGS_EXTRA) - -# Build flashable .bin file all build example: firmware.bin -# .bin file is made from .elf file, by concatenating .text and .data sections firmware.bin: firmware.elf arm-none-eabi-objcopy -O binary $< $@ -# .elf file is produced by compiling sources -firmware.elf: $(SOURCES) hal.h link.ld cmsis_core cmsis_device_f7 +firmware.elf: cmsis_core cmsis_f7 $(SOURCES) hal.h link.ld arm-none-eabi-gcc $(SOURCES) $(CFLAGS) $(LDFLAGS) -o $@ -# Flash .bin file to the target board via the built-in debugger flash: firmware.bin st-flash --reset write $< 0x8000000 -# Download ST's CMSIS headers with peripheral definitions -cmsis_device_f7/Source/Templates/gcc/startup_stm32f746xx.s: cmsis_device_f7 -cmsis_device_f7: - git clone --depth 1 -b $(CMSIS_DEVICE_VERSION) $(CMSIS_DEVICE_REPO) $@ +cmsis_f7: # ARM CMSIS core headers + git clone --depth 1 -b v1.2.8 https://github.com/STMicroelectronics/cmsis_device_f7 $@ +cmsis_core: # ST CMSIS headers for STM32F7 series + git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@ -# Download ARM's CMSIS headers with core Cortex-M definitions -cmsis_core: - git clone --depth 1 -b $(CMSIS_CORE_VERSION) $(CMSIS_CORE_REPO) $@ - -# Requires env variable VCON_API_KEY set +# Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/ DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/5 - -# Upload firmware to a remote test device update: firmware.bin curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$< -# Read serial port on a remote test device for 5 seconds, store in a -# temporary file, and check the output for expected patterns test: CFLAGS_EXTRA += -DUART_DEBUG=USART1 test: update curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=5 | tee /tmp/output.txt diff --git a/examples/stm32/nucleo-f746zg-baremetal/main.c b/examples/stm32/nucleo-f746zg-baremetal/main.c index 8d3e5d6d..0c4384eb 100644 --- a/examples/stm32/nucleo-f746zg-baremetal/main.c +++ b/examples/stm32/nucleo-f746zg-baremetal/main.c @@ -4,7 +4,12 @@ #include "hal.h" #include "mongoose.h" -#define LED PIN('B', 7) // On-board LED pin +#define LED1 PIN('B', 0) // On-board LED pin (green) +#define LED2 PIN('B', 7) // On-board LED pin (blue) +#define LED3 PIN('B', 14) // On-board LED pin (red) +#define BTN1 PIN('C', 13) // On-board user button + +#define LED LED2 // Use blue LED for blinking #define BLINK_PERIOD_MS 1000 // LED blinking period in millis static uint64_t s_ticks; // Milliseconds since boot @@ -29,7 +34,7 @@ static void timer_fn(void *arg) { const char *names[] = {"down", "up", "ready"}; // network stats MG_INFO(("Ethernet: %s, IP: %M, rx:%u, tx:%u, dr:%u, er:%u", names[ifp->state], mg_print_ip4, &ifp->ip, ifp->nrecv, ifp->nsent, - ifp->ndropped, ifp->nerr)); + ifp->ndrop, ifp->nerr)); } static void ethernet_init(void) { diff --git a/examples/stm32/nucleo-f746zg-freertos-mip/FreeRTOSConfig.h b/examples/stm32/nucleo-f746zg-freertos-mip/FreeRTOSConfig.h index f67f11bf..8ae184bb 100644 --- a/examples/stm32/nucleo-f746zg-freertos-mip/FreeRTOSConfig.h +++ b/examples/stm32/nucleo-f746zg-freertos-mip/FreeRTOSConfig.h @@ -1,6 +1,6 @@ #pragma once -#include "mcu.h" +#include "hal.h" #define configUSE_PREEMPTION 1 #define configCPU_CLOCK_HZ SYS_FREQUENCY diff --git a/examples/stm32/nucleo-f746zg-freertos-mip/Makefile b/examples/stm32/nucleo-f746zg-freertos-mip/Makefile index c526d656..512385bd 100644 --- a/examples/stm32/nucleo-f746zg-freertos-mip/Makefile +++ b/examples/stm32/nucleo-f746zg-freertos-mip/Makefile @@ -1,34 +1,49 @@ -CFLAGS ?= -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion \ - -Wformat-truncation -fno-common -Wconversion \ - -g3 -Os -ffunction-sections -fdata-sections \ - -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 \ - -I. -I../../../ $(EXTRA_CFLAGS) -LDFLAGS ?= -Tlink.ld -nostartfiles -nostdlib --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map -SOURCES = main.c boot.c syscalls.c ../../../mongoose.c +CFLAGS = -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion +CFLAGS += -Wformat-truncation -fno-common -Wconversion -Wno-sign-conversion +CFLAGS += -g3 -Os -ffunction-sections -fdata-sections +CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include -Icmsis_f7/Include +CFLAGS += -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 +LDFLAGS ?= -Tlink.ld -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map -FREERTOS_VERSION ?= V10.5.0 -FREERTOS_REPO ?= https://github.com/FreeRTOS/FreeRTOS-Kernel +SOURCES = main.c syscalls.c sysinit.c +SOURCES += cmsis_f7/Source/Templates/gcc/startup_stm32f746xx.s # ST startup file. Compiler-dependent! -build example: firmware.bin +# FreeRTOS +SOURCES += FreeRTOS-Kernel/portable/MemMang/heap_4.c +SOURCES += FreeRTOS-Kernel/portable/GCC/ARM_CM7/r0p1/port.c +CFLAGS += -IFreeRTOS-Kernel/include +CFLAGS += -IFreeRTOS-Kernel/portable/GCC/ARM_CM7/r0p1 -Wno-conversion + +SOURCES += ../../../mongoose.c # Mongoose options are defined in mongoose_custom.h +CFLAGS += -I../../.. $(CFLAGS_EXTRA) + +all build example: firmware.bin -firmware.elf: FreeRTOS-Kernel $(SOURCES) - arm-none-eabi-gcc -o $@ $(SOURCES) $(CFLAGS) \ - -IFreeRTOS-Kernel/include \ - -IFreeRTOS-Kernel/portable/GCC/ARM_CM7/r0p1 \ - -Wno-conversion \ - $(wildcard FreeRTOS-Kernel/*.c) \ - FreeRTOS-Kernel/portable/MemMang/heap_4.c \ - FreeRTOS-Kernel/portable/GCC/ARM_CM7/r0p1/port.c \ - $(LDFLAGS) - firmware.bin: firmware.elf arm-none-eabi-objcopy -O binary $< $@ -flash: firmware.bin - st-flash --reset write firmware.bin 0x8000000 +firmware.elf: FreeRTOS-Kernel cmsis_core cmsis_f7 $(SOURCES) hal.h link.ld + arm-none-eabi-gcc $(SOURCES) $(wildcard FreeRTOS-Kernel/*.c) $(CFLAGS) $(LDFLAGS) -o $@ -FreeRTOS-Kernel: - git clone --depth 1 -b $(FREERTOS_VERSION) $(FREERTOS_REPO) $@ +flash: firmware.bin + st-flash --reset write $< 0x8000000 + +cmsis_f7: # ARM CMSIS core headers + git clone --depth 1 -b v1.2.8 https://github.com/STMicroelectronics/cmsis_device_f7 $@ +cmsis_core: # ST CMSIS headers for STM32F7 series + git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@ +FreeRTOS-Kernel: # FreeRTOS sources + git clone --depth 1 -b V10.5.0 https://github.com/FreeRTOS/FreeRTOS-Kernel $@ + +# Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/ +DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/5 +update: firmware.bin + curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$< + +test: CFLAGS_EXTRA += -DUART_DEBUG=USART1 +test: update + curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=5 | tee /tmp/output.txt + grep 'READY, IP:' /tmp/output.txt # Check for network init clean: - rm -rf firmware.* FreeRTOS-Kernel + @rm -rf firmware.* *.su cmsis_core cmsis_f7 FreeRTOS-Kernel diff --git a/examples/stm32/nucleo-f746zg-freertos-mip/boot.c b/examples/stm32/nucleo-f746zg-freertos-mip/boot.c deleted file mode 100644 index 9d10305c..00000000 --- a/examples/stm32/nucleo-f746zg-freertos-mip/boot.c +++ /dev/null @@ -1,169 +0,0 @@ -// Copyright (c) 2022 Cesanta Software Limited -// All rights reserved - -// Startup code -__attribute__((naked, noreturn)) void _reset(void) { - // Initialise memory - extern long _sbss, _ebss, _sdata, _edata, _sidata; - for (long *src = &_sbss; src < &_ebss; src++) *src = 0; - for (long *src = &_sdata, *dst = &_sidata; src < &_edata;) *src++ = *dst++; - - // Call main() - extern void main(void); - main(); - for (;;) (void) 0; -} - -void __attribute__((weak)) DefaultIRQHandler(void) { - for (;;) (void) 0; -} - -#define WEAK_ALIAS __attribute__((weak, alias("DefaultIRQHandler"))) - -WEAK_ALIAS void NMI_Handler(void); -WEAK_ALIAS void HardFault_Handler(void); -WEAK_ALIAS void MemManage_Handler(void); -WEAK_ALIAS void BusFault_Handler(void); -WEAK_ALIAS void UsageFault_Handler(void); -WEAK_ALIAS void SVC_Handler(void); -WEAK_ALIAS void DebugMon_Handler(void); -WEAK_ALIAS void PendSV_Handler(void); -WEAK_ALIAS void SysTick_Handler(void); - -WEAK_ALIAS void WWDG_IRQHandler(void); -WEAK_ALIAS void PVD_IRQHandler(void); -WEAK_ALIAS void TAMP_STAMP_IRQHandler(void); -WEAK_ALIAS void RTC_WKUP_IRQHandler(void); -WEAK_ALIAS void FLASH_IRQHandler(void); -WEAK_ALIAS void RCC_IRQHandler(void); -WEAK_ALIAS void EXTI0_IRQHandler(void); -WEAK_ALIAS void EXTI1_IRQHandler(void); -WEAK_ALIAS void EXTI2_IRQHandler(void); -WEAK_ALIAS void EXTI3_IRQHandler(void); -WEAK_ALIAS void EXTI4_IRQHandler(void); -WEAK_ALIAS void EXTI9_5_IRQHandler(void); -WEAK_ALIAS void EXTI15_10_IRQHandler(void); -WEAK_ALIAS void DMA1_Stream0_IRQHandler(void); -WEAK_ALIAS void DMA1_Stream1_IRQHandler(void); -WEAK_ALIAS void DMA1_Stream2_IRQHandler(void); -WEAK_ALIAS void DMA1_Stream3_IRQHandler(void); -WEAK_ALIAS void DMA1_Stream4_IRQHandler(void); -WEAK_ALIAS void DMA1_Stream5_IRQHandler(void); -WEAK_ALIAS void DMA1_Stream6_IRQHandler(void); -WEAK_ALIAS void ADC_IRQHandler(void); -WEAK_ALIAS void CAN1_TX_IRQHandler(void); -WEAK_ALIAS void CAN1_RX0_IRQHandler(void); -WEAK_ALIAS void CAN1_RX1_IRQHandler(void); -WEAK_ALIAS void CAN1_SCE_IRQHandler(void); -WEAK_ALIAS void TIM1_BRK_TIM9_IRQHandler(void); -WEAK_ALIAS void TIM1_UP_TIM10_IRQHandler(void); -WEAK_ALIAS void TIM1_TRG_COM_TIM11_IRQHandler(void); -WEAK_ALIAS void TIM1_CC_IRQHandler(void); -WEAK_ALIAS void TIM2_IRQHandler(void); -WEAK_ALIAS void TIM3_IRQHandler(void); -WEAK_ALIAS void TIM4_IRQHandler(void); -WEAK_ALIAS void I2C1_EV_IRQHandler(void); -WEAK_ALIAS void I2C1_ER_IRQHandler(void); -WEAK_ALIAS void I2C2_EV_IRQHandler(void); -WEAK_ALIAS void I2C2_ER_IRQHandler(void); -WEAK_ALIAS void SPI1_IRQHandler(void); -WEAK_ALIAS void SPI2_IRQHandler(void); -WEAK_ALIAS void USART1_IRQHandler(void); -WEAK_ALIAS void USART2_IRQHandler(void); -WEAK_ALIAS void USART3_IRQHandler(void); -WEAK_ALIAS void RTC_Alarm_IRQHandler(void); -WEAK_ALIAS void OTG_FS_WKUP_IRQHandler(void); -WEAK_ALIAS void TIM8_BRK_TIM12_IRQHandler(void); -WEAK_ALIAS void TIM8_UP_TIM13_IRQHandler(void); -WEAK_ALIAS void TIM8_TRG_COM_TIM14_IRQHandler(void); -WEAK_ALIAS void TIM8_CC_IRQHandler(void); -WEAK_ALIAS void DMA1_Stream7_IRQHandler(void); -WEAK_ALIAS void FMC_IRQHandler(void); -WEAK_ALIAS void SDMMC1_IRQHandler(void); -WEAK_ALIAS void TIM5_IRQHandler(void); -WEAK_ALIAS void SPI3_IRQHandler(void); -WEAK_ALIAS void UART4_IRQHandler(void); -WEAK_ALIAS void UART5_IRQHandler(void); -WEAK_ALIAS void TIM6_DAC_IRQHandler(void); -WEAK_ALIAS void TIM7_IRQHandler(void); -WEAK_ALIAS void DMA2_Stream0_IRQHandler(void); -WEAK_ALIAS void DMA2_Stream1_IRQHandler(void); -WEAK_ALIAS void DMA2_Stream2_IRQHandler(void); -WEAK_ALIAS void DMA2_Stream3_IRQHandler(void); -WEAK_ALIAS void DMA2_Stream4_IRQHandler(void); -WEAK_ALIAS void ETH_IRQHandler(void); -WEAK_ALIAS void ETH_WKUP_IRQHandler(void); -WEAK_ALIAS void CAN2_TX_IRQHandler(void); -WEAK_ALIAS void CAN2_RX0_IRQHandler(void); -WEAK_ALIAS void CAN2_RX1_IRQHandler(void); -WEAK_ALIAS void CAN2_SCE_IRQHandler(void); -WEAK_ALIAS void OTG_FS_IRQHandler(void); -WEAK_ALIAS void DMA2_Stream5_IRQHandler(void); -WEAK_ALIAS void DMA2_Stream6_IRQHandler(void); -WEAK_ALIAS void DMA2_Stream7_IRQHandler(void); -WEAK_ALIAS void USART6_IRQHandler(void); -WEAK_ALIAS void I2C3_EV_IRQHandler(void); -WEAK_ALIAS void I2C3_ER_IRQHandler(void); -WEAK_ALIAS void OTG_HS_EP1_OUT_IRQHandler(void); -WEAK_ALIAS void OTG_HS_EP1_IN_IRQHandler(void); -WEAK_ALIAS void OTG_HS_WKUP_IRQHandler(void); -WEAK_ALIAS void OTG_HS_IRQHandler(void); -WEAK_ALIAS void DCMI_IRQHandler(void); -WEAK_ALIAS void RNG_IRQHandler(void); -WEAK_ALIAS void FPU_IRQHandler(void); -WEAK_ALIAS void UART7_IRQHandler(void); -WEAK_ALIAS void UART8_IRQHandler(void); -WEAK_ALIAS void SPI4_IRQHandler(void); -WEAK_ALIAS void SPI5_IRQHandler(void); -WEAK_ALIAS void SPI6_IRQHandler(void); -WEAK_ALIAS void SAI1_IRQHandler(void); -WEAK_ALIAS void LTDC_IRQHandler(void); -WEAK_ALIAS void LTDC_ER_IRQHandler(void); -WEAK_ALIAS void DMA2D_IRQHandler(void); -WEAK_ALIAS void SAI2_IRQHandler(void); -WEAK_ALIAS void QUADSPI_IRQHandler(void); -WEAK_ALIAS void LPTIM1_IRQHandler(void); -WEAK_ALIAS void CEC_IRQHandler(void); -WEAK_ALIAS void I2C4_EV_IRQHandler(void); -WEAK_ALIAS void I2C4_ER_IRQHandler(void); -WEAK_ALIAS void SPDIF_RX_IRQHandler(void); - -// IRQ table -extern void _estack(); -__attribute__((section(".vectors"))) void (*tab[16 + 98])(void) = { - // Cortex interrupts - _estack, _reset, NMI_Handler, HardFault_Handler, MemManage_Handler, - BusFault_Handler, UsageFault_Handler, 0, 0, 0, 0, SVC_Handler, - DebugMon_Handler, 0, PendSV_Handler, SysTick_Handler, - - // Interrupts from peripherals - WWDG_IRQHandler, PVD_IRQHandler, TAMP_STAMP_IRQHandler, RTC_WKUP_IRQHandler, - FLASH_IRQHandler, RCC_IRQHandler, EXTI0_IRQHandler, EXTI1_IRQHandler, - EXTI2_IRQHandler, EXTI3_IRQHandler, EXTI4_IRQHandler, - DMA1_Stream0_IRQHandler, DMA1_Stream1_IRQHandler, DMA1_Stream2_IRQHandler, - DMA1_Stream3_IRQHandler, DMA1_Stream4_IRQHandler, DMA1_Stream5_IRQHandler, - DMA1_Stream6_IRQHandler, ADC_IRQHandler, CAN1_TX_IRQHandler, - CAN1_RX0_IRQHandler, CAN1_RX1_IRQHandler, CAN1_SCE_IRQHandler, - EXTI9_5_IRQHandler, TIM1_BRK_TIM9_IRQHandler, TIM1_UP_TIM10_IRQHandler, - TIM1_TRG_COM_TIM11_IRQHandler, TIM1_CC_IRQHandler, TIM2_IRQHandler, - TIM3_IRQHandler, TIM4_IRQHandler, I2C1_EV_IRQHandler, I2C1_ER_IRQHandler, - I2C2_EV_IRQHandler, I2C2_ER_IRQHandler, SPI1_IRQHandler, SPI2_IRQHandler, - USART1_IRQHandler, USART2_IRQHandler, USART3_IRQHandler, - EXTI15_10_IRQHandler, RTC_Alarm_IRQHandler, OTG_FS_WKUP_IRQHandler, - TIM8_BRK_TIM12_IRQHandler, TIM8_UP_TIM13_IRQHandler, - TIM8_TRG_COM_TIM14_IRQHandler, TIM8_CC_IRQHandler, DMA1_Stream7_IRQHandler, - FMC_IRQHandler, SDMMC1_IRQHandler, TIM5_IRQHandler, SPI3_IRQHandler, - UART4_IRQHandler, UART5_IRQHandler, TIM6_DAC_IRQHandler, TIM7_IRQHandler, - DMA2_Stream0_IRQHandler, DMA2_Stream1_IRQHandler, DMA2_Stream2_IRQHandler, - DMA2_Stream3_IRQHandler, DMA2_Stream4_IRQHandler, ETH_IRQHandler, - ETH_WKUP_IRQHandler, CAN2_TX_IRQHandler, CAN2_RX0_IRQHandler, - CAN2_RX1_IRQHandler, CAN2_SCE_IRQHandler, OTG_FS_IRQHandler, - DMA2_Stream5_IRQHandler, DMA2_Stream6_IRQHandler, DMA2_Stream7_IRQHandler, - USART6_IRQHandler, I2C3_EV_IRQHandler, I2C3_ER_IRQHandler, - OTG_HS_EP1_OUT_IRQHandler, OTG_HS_EP1_IN_IRQHandler, OTG_HS_WKUP_IRQHandler, - OTG_HS_IRQHandler, DCMI_IRQHandler, 0, RNG_IRQHandler, FPU_IRQHandler, - UART7_IRQHandler, UART8_IRQHandler, SPI4_IRQHandler, SPI5_IRQHandler, - SPI6_IRQHandler, SAI1_IRQHandler, LTDC_IRQHandler, LTDC_ER_IRQHandler, - DMA2D_IRQHandler, SAI2_IRQHandler, QUADSPI_IRQHandler, LPTIM1_IRQHandler, - CEC_IRQHandler, I2C4_EV_IRQHandler, I2C4_ER_IRQHandler, - SPDIF_RX_IRQHandler}; diff --git a/examples/stm32/nucleo-f746zg-freertos-mip/hal.h b/examples/stm32/nucleo-f746zg-freertos-mip/hal.h new file mode 100644 index 00000000..4aac3b3f --- /dev/null +++ b/examples/stm32/nucleo-f746zg-freertos-mip/hal.h @@ -0,0 +1,134 @@ +// Copyright (c) 2022 Cesanta Software Limited +// All rights reserved +// https://www.st.com/resource/en/reference_manual/dm00124865-stm32f75xxx-and-stm32f74xxx-advanced-arm-based-32-bit-mcus-stmicroelectronics.pdf + +#pragma once + +#include + +#include +#include +#include +#include + +#define BIT(x) (1UL << (x)) +#define SETBITS(R, CLEARMASK, SETMASK) (R) = ((R) & ~(CLEARMASK)) | (SETMASK) +#define PIN(bank, num) ((((bank) - 'A') << 8) | (num)) +#define PINNO(pin) (pin & 255) +#define PINBANK(pin) (pin >> 8) + +/* System clock +5.3.3: APB1 clock <= 54MHz; APB2 clock <= 108MHz +3.3.2, Table 5: configure flash latency (WS) in accordance to clock freq +38.4: The AHB clock frequency must be at least 25 MHz when the Ethernet +controller is used */ +enum { APB1_PRE = 5 /* AHB clock / 4 */, APB2_PRE = 4 /* AHB clock / 2 */ }; +enum { PLL_HSI = 16, PLL_M = 8, PLL_N = 216, PLL_P = 2 }; // Run at 216 Mhz +#define FLASH_LATENCY 7 +#define SYS_FREQUENCY ((PLL_HSI * PLL_N / PLL_M / PLL_P) * 1000000) +#define APB2_FREQUENCY (SYS_FREQUENCY / (BIT(APB2_PRE - 3))) +#define APB1_FREQUENCY (SYS_FREQUENCY / (BIT(APB1_PRE - 3))) + +static inline void spin(volatile uint32_t count) { + while (count--) (void) 0; +} + +enum { GPIO_MODE_INPUT, GPIO_MODE_OUTPUT, GPIO_MODE_AF, GPIO_MODE_ANALOG }; +enum { GPIO_OTYPE_PUSH_PULL, GPIO_OTYPE_OPEN_DRAIN }; +enum { GPIO_SPEED_LOW, GPIO_SPEED_MEDIUM, GPIO_SPEED_HIGH, GPIO_SPEED_INSANE }; +enum { GPIO_PULL_NONE, GPIO_PULL_UP, GPIO_PULL_DOWN }; +#define GPIO(N) ((GPIO_TypeDef *) (0x40020000 + 0x400 * (N))) + +static GPIO_TypeDef *gpio_bank(uint16_t pin) { return GPIO(PINBANK(pin)); } +static inline void gpio_toggle(uint16_t pin) { + GPIO_TypeDef *gpio = gpio_bank(pin); + uint32_t mask = BIT(PINNO(pin)); + gpio->BSRR = mask << (gpio->ODR & mask ? 16 : 0); +} +static inline int gpio_read(uint16_t pin) { + return gpio_bank(pin)->IDR & BIT(PINNO(pin)) ? 1 : 0; +} +static inline void gpio_write(uint16_t pin, bool val) { + GPIO_TypeDef *gpio = gpio_bank(pin); + gpio->BSRR = BIT(PINNO(pin)) << (val ? 0 : 16); +} +static inline void gpio_init(uint16_t pin, uint8_t mode, uint8_t type, + uint8_t speed, uint8_t pull, uint8_t af) { + GPIO_TypeDef *gpio = gpio_bank(pin); + uint8_t n = (uint8_t) (PINNO(pin)); + RCC->AHB1ENR |= BIT(PINBANK(pin)); // Enable GPIO clock + SETBITS(gpio->OTYPER, 1UL << n, ((uint32_t) type) << n); + SETBITS(gpio->OSPEEDR, 3UL << (n * 2), ((uint32_t) speed) << (n * 2)); + SETBITS(gpio->PUPDR, 3UL << (n * 2), ((uint32_t) pull) << (n * 2)); + SETBITS(gpio->AFR[n >> 3], 15UL << ((n & 7) * 4), + ((uint32_t) af) << ((n & 7) * 4)); + SETBITS(gpio->MODER, 3UL << (n * 2), ((uint32_t) mode) << (n * 2)); +} +static inline void gpio_input(uint16_t pin) { + gpio_init(pin, GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, + GPIO_PULL_NONE, 0); +} +static inline void gpio_output(uint16_t pin) { + gpio_init(pin, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, + GPIO_PULL_NONE, 0); +} + +static inline void irq_exti_attach(uint16_t pin) { + uint8_t bank = (uint8_t) (PINBANK(pin)), n = (uint8_t) (PINNO(pin)); + RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN; // Enable SYSCFG + SYSCFG->EXTICR[n / 4] &= ~(15UL << ((n % 4) * 4)); + SYSCFG->EXTICR[n / 4] |= (uint32_t) (bank << ((n % 4) * 4)); + EXTI->IMR |= BIT(n); + EXTI->RTSR |= BIT(n); + EXTI->FTSR |= BIT(n); + int irqvec = n < 5 ? 6 + n : n < 10 ? 23 : 40; // IRQ vector index, 10.1.2 + NVIC_SetPriority(irqvec, 3); + NVIC_EnableIRQ(irqvec); +} + +#ifndef UART_DEBUG +#define UART_DEBUG USART3 +#endif + +static inline void uart_init(USART_TypeDef *uart, unsigned long baud) { + // https://www.st.com/resource/en/datasheet/stm32f746zg.pdf + uint8_t af = 7; // Alternate function + uint16_t rx = 0, tx = 0; // pins + uint32_t freq = 0; // Bus frequency. UART1 is on APB2, rest on APB1 + + if (uart == USART1) freq = APB2_FREQUENCY, RCC->APB2ENR |= BIT(4); + if (uart == USART2) freq = APB1_FREQUENCY, RCC->APB1ENR |= BIT(17); + if (uart == USART3) freq = APB1_FREQUENCY, RCC->APB1ENR |= BIT(18); + + if (uart == USART1) tx = PIN('A', 9), rx = PIN('A', 10); + if (uart == USART2) tx = PIN('A', 2), rx = PIN('A', 3); + if (uart == USART3) tx = PIN('D', 8), rx = PIN('D', 9); + + gpio_init(tx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af); + gpio_init(rx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af); + uart->CR1 = 0; // Disable this UART + uart->BRR = freq / baud; // Set baud rate + uart->CR1 |= BIT(0) | BIT(2) | BIT(3); // Set UE, RE, TE +} +static inline void uart_write_byte(USART_TypeDef *uart, uint8_t byte) { + uart->TDR = byte; + while ((uart->ISR & BIT(7)) == 0) spin(1); +} +static inline void uart_write_buf(USART_TypeDef *uart, char *buf, size_t len) { + while (len-- > 0) uart_write_byte(uart, *(uint8_t *) buf++); +} +static inline int uart_read_ready(USART_TypeDef *uart) { + return uart->ISR & BIT(5); // If RXNE bit is set, data is ready +} +static inline uint8_t uart_read_byte(USART_TypeDef *uart) { + return (uint8_t) (uart->RDR & 255); +} + +static inline void rng_init(void) { + RCC->AHB2ENR |= RCC_AHB2ENR_RNGEN; + RNG->CR |= RNG_CR_RNGEN; +} +static inline uint32_t rng_read(void) { + while ((RNG->SR & RNG_SR_DRDY) == 0) (void) 0; + return RNG->DR; +} diff --git a/examples/stm32/nucleo-f746zg-freertos-mip/link.ld b/examples/stm32/nucleo-f746zg-freertos-mip/link.ld index 87f9375a..330baddd 100644 --- a/examples/stm32/nucleo-f746zg-freertos-mip/link.ld +++ b/examples/stm32/nucleo-f746zg-freertos-mip/link.ld @@ -1,14 +1,14 @@ -ENTRY(_reset); +ENTRY(Reset_Handler); MEMORY { - flash(rx) : ORIGIN = 0x08000000, LENGTH = 1024k + flash(rx) : ORIGIN = 0x08000000, LENGTH = 1024k sram(rwx) : ORIGIN = 0x20000000, LENGTH = 320k } _estack = ORIGIN(sram) + LENGTH(sram); /* stack points to end of SRAM */ SECTIONS { - .vectors : { KEEP(*(.vectors)) } > flash - .text : { *(.text*) } > flash - .rodata : { *(.rodata*) } > flash + .vectors : { KEEP(*(.isr_vector)) } > flash + .text : { *(.text* .text.*) } > flash + .rodata : { *(.rodata*) } > flash .data : { _sdata = .; /* for init_ram() */ diff --git a/examples/stm32/nucleo-f746zg-freertos-mip/main.c b/examples/stm32/nucleo-f746zg-freertos-mip/main.c index e59e8795..e3fccc0b 100644 --- a/examples/stm32/nucleo-f746zg-freertos-mip/main.c +++ b/examples/stm32/nucleo-f746zg-freertos-mip/main.c @@ -1,9 +1,24 @@ // Copyright (c) 2022 Cesanta Software Limited // All rights reserved -#include "mcu.h" +#include "hal.h" #include "mongoose.h" +#define LED1 PIN('B', 0) // On-board LED pin (green) +#define LED2 PIN('B', 7) // On-board LED pin (blue) +#define LED3 PIN('B', 14) // On-board LED pin (red) +#define BTN1 PIN('C', 13) // On-board user button + +#define LED LED2 // Use blue LED for blinking +#define BLINK_PERIOD_MS 1000 // LED blinking period in millis + +void mg_random(void *buf, size_t len) { // Use on-board RNG + for (size_t n = 0; n < len; n += sizeof(uint32_t)) { + uint32_t r = rng_read(); + memcpy((char *) buf + n, &r, n + sizeof(r) > len ? len - n : sizeof(r)); + } +} + // HTTP server event handler function static void fn(struct mg_connection *c, int ev, void *ev_data, void *fn_data) { if (ev == MG_EV_HTTP_MSG) { @@ -27,14 +42,20 @@ static void ethernet_init(void) { PIN('C', 5), PIN('G', 11), PIN('G', 13)}; for (size_t i = 0; i < sizeof(pins) / sizeof(pins[0]); i++) { gpio_init(pins[i], GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_INSANE, - GPIO_PULL_NONE, 11); + GPIO_PULL_NONE, 11); // 11 is the Ethernet function } - nvic_enable_irq(61); // Setup Ethernet IRQ handler - RCC->APB2ENR |= BIT(14); // Enable SYSCFG - SYSCFG->PMC |= BIT(23); // Use RMII. Goes first! - RCC->AHB1ENR |= BIT(25) | BIT(26) | BIT(27); // Enable Ethernet clocks - RCC->AHB1RSTR |= BIT(25); // ETHMAC force reset - RCC->AHB1RSTR &= ~BIT(25); // ETHMAC release reset + NVIC_EnableIRQ(ETH_IRQn); // Setup Ethernet IRQ handler + SYSCFG->PMC |= SYSCFG_PMC_MII_RMII_SEL; // Use RMII. Goes first! + RCC->AHB1ENR |= + RCC_AHB1ENR_ETHMACEN | RCC_AHB1ENR_ETHMACTXEN | RCC_AHB1ENR_ETHMACRXEN; +} + +static void timer_fn(void *arg) { + struct mip_if *ifp = arg; // And show + const char *names[] = {"down", "up", "ready"}; // network stats + MG_INFO(("Ethernet: %s, IP: %M, rx:%u, tx:%u, dr:%u, er:%u", + names[ifp->state], mg_print_ip4, &ifp->ip, ifp->nrecv, ifp->nsent, + ifp->ndrop, ifp->nerr)); } static void server(void *args) { @@ -47,37 +68,36 @@ static void server(void *args) { // IP configuration. If IP/mask/GW are unset, DHCP is going to be used MG_INFO(("Initializing Ethernet driver")); ethernet_init(); - struct mip_driver_stm32_data driver_data = {.mdc_cr = 4}; // See driver_stm32.h - struct mip_if mif = { - .mac = {2, 0, 1, 2, 3, 5}, - .driver = &mip_driver_stm32, - .driver_data = &driver_data, - }; + struct mip_driver_stm32_data driver_data = {.mdc_cr = 4}; + struct mip_if mif = {.driver = &mip_driver_stm32, + .driver_data = &driver_data}; mip_init(&mgr, &mif); MG_INFO(("Starting Mongoose v%s", MG_VERSION)); // Tell the world mg_http_listen(&mgr, "http://0.0.0.0", fn, &mgr); // Web listener - while (args == NULL) mg_mgr_poll(&mgr, 1000); // Infinite event loop - mg_mgr_free(&mgr); // Unreachable + mg_timer_add(&mgr, BLINK_PERIOD_MS, MG_TIMER_REPEAT, timer_fn, &mif); + + for (;;) mg_mgr_poll(&mgr, 1); // Infinite event loop + (void) args; } static void blinker(void *args) { - uint16_t led = PIN('B', 7); - gpio_init(led, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_MEDIUM, + gpio_init(LED, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_MEDIUM, GPIO_PULL_NONE, 0); for (;;) { - gpio_toggle(led); - vTaskDelay(pdMS_TO_TICKS(750)); - MG_INFO(("blink %s, RAM: %u", (char *) args, xPortGetFreeHeapSize())); + gpio_toggle(LED); + vTaskDelay(pdMS_TO_TICKS(BLINK_PERIOD_MS)); } + (void) args; } int main(void) { - clock_init(); // Set clock to max of 180 MHz - systick_init(SYS_FREQUENCY / 1000); // Tick every 1 ms - uart_init(UART3, 115200); // Initialise UART + uart_init(UART_DEBUG, 115200); // Initialise UART + + // Start tasks. NOTE: stack sizes are in 32-bit words xTaskCreate(blinker, "blinker", 128, ":)", configMAX_PRIORITIES - 1, NULL); xTaskCreate(server, "server", 2048, 0, configMAX_PRIORITIES - 1, NULL); + vTaskStartScheduler(); // This blocks return 0; } diff --git a/examples/stm32/nucleo-f746zg-freertos-mip/mcu.h b/examples/stm32/nucleo-f746zg-freertos-mip/mcu.h deleted file mode 100644 index 6acd6417..00000000 --- a/examples/stm32/nucleo-f746zg-freertos-mip/mcu.h +++ /dev/null @@ -1,216 +0,0 @@ -// Copyright (c) 2022 Cesanta Software Limited -// All rights reserved -// https://www.st.com/resource/en/reference_manual/dm00124865-stm32f75xxx-and-stm32f74xxx-advanced-arm-based-32-bit-mcus-stmicroelectronics.pdf - -#pragma once - -#include -#include -#include -#include - -#define BIT(x) (1UL << (x)) -#define SETBITS(R, CLEARMASK, SETMASK) (R) = ((R) & ~(CLEARMASK)) | (SETMASK) -#define PIN(bank, num) ((((bank) - 'A') << 8) | (num)) -#define PINNO(pin) (pin & 255) -#define PINBANK(pin) (pin >> 8) - -/* System clock -5.3.3: APB1 clock <= 54MHz; APB2 clock <= 108MHz -3.3.2, Table 5: configure flash latency (WS) in accordance to clock freq -38.4: The AHB clock frequency must be at least 25 MHz when the Ethernet controller is used */ -enum { APB1_PRE = 5 /* AHB clock / 4 */, APB2_PRE = 4 /* AHB clock / 2 */ }; -enum { PLL_HSI = 16, PLL_M = 8, PLL_N = 216, PLL_P = 2 }; // Run at 216 Mhz -#define FLASH_LATENCY 7 -#define SYS_FREQUENCY ((PLL_HSI * PLL_N / PLL_M / PLL_P) * 1000000) -#define APB2_FREQUENCY (SYS_FREQUENCY / (BIT(APB2_PRE - 3))) -#define APB1_FREQUENCY (SYS_FREQUENCY / (BIT(APB1_PRE - 3))) - -static inline void spin(volatile uint32_t count) { - while (count--) asm("nop"); -} - -struct rcc { - volatile uint32_t CR, PLLCFGR, CFGR, CIR, AHB1RSTR, AHB2RSTR, AHB3RSTR, - RESERVED0, APB1RSTR, APB2RSTR, RESERVED1[2], AHB1ENR, AHB2ENR, AHB3ENR, - RESERVED2, APB1ENR, APB2ENR, RESERVED3[2], AHB1LPENR, AHB2LPENR, - AHB3LPENR, RESERVED4, APB1LPENR, APB2LPENR, RESERVED5[2], BDCR, CSR, - RESERVED6[2], SSCGR, PLLI2SCFGR, PLLSAICFGR, DCKCFGR1, DCKCFGR2; -}; -#define RCC ((struct rcc *) 0x40023800) - -struct pwr { - volatile uint32_t CR1, CSR1, CR2, CSR2; -}; -#define PWR ((struct pwr *) 0x40007000) - -struct nvic { - volatile uint32_t ISER[8], RESERVED0[24], ICER[8], RSERVED1[24], ISPR[8], - RESERVED2[24], ICPR[8], RESERVED3[24], IABR[8], RESERVED4[56], IP[240], - RESERVED5[644], STIR; -}; -#define NVIC ((struct nvic *) 0xe000e100) -static inline void nvic_set_prio(int irq, uint32_t prio) { - NVIC->IP[irq] = prio << 4; -} -static inline void nvic_enable_irq(int irq) { - NVIC->ISER[irq >> 5] = (uint32_t) (1 << (irq & 31)); -} - -struct systick { - volatile uint32_t CTRL, LOAD, VAL, CALIB; -}; -#define SYSTICK ((struct systick *) 0xe000e010) // 2.2.2 -static inline void systick_init(uint32_t ticks) { - if ((ticks - 1) > 0xffffff) return; // Systick timer is 24 bit - SYSTICK->LOAD = ticks - 1; - SYSTICK->VAL = 0; - SYSTICK->CTRL = BIT(0) | BIT(1) | BIT(2); // Enable systick -} - -struct flash { - volatile uint32_t ACR, KEYR, OPTKEYR, SR, CR, AR, RESERVED, OBR, WRPR; -}; -#define FLASH ((struct flash *) 0x40023c00) - -struct scb { - volatile uint32_t CPUID, ICSR, VTOR, AIRCR, SCR, CCR, SHPR[3], SHCSR, CFSR, - HFSR, DFSR, MMFAR, BFAR, AFSR, ID_PFR[2], ID_DFR, ID_AFR, ID_MFR[4], - ID_ISAR[5], RESERVED0[1], CLIDR, CTR, CCSIDR, CSSELR, CPACR, - RESERVED3[93], STIR, RESERVED4[15], MVFR0, MVFR1, MVFR2, RESERVED5[1], - ICIALLU, RESERVED6[1], ICIMVAU, DCIMVAC, DCISW, DCCMVAU, DCCMVAC, DCCSW, - DCCIMVAC, DCCISW, RESERVED7[6], ITCMCR, DTCMCR, AHBPCR, CACR, AHBSCR, - RESERVED8[1], ABFSR; -}; -#define SCB ((struct scb *) 0xe000ed00) - -enum { GPIO_MODE_INPUT, GPIO_MODE_OUTPUT, GPIO_MODE_AF, GPIO_MODE_ANALOG }; -enum { GPIO_OTYPE_PUSH_PULL, GPIO_OTYPE_OPEN_DRAIN }; -enum { GPIO_SPEED_LOW, GPIO_SPEED_MEDIUM, GPIO_SPEED_HIGH, GPIO_SPEED_INSANE }; -enum { GPIO_PULL_NONE, GPIO_PULL_UP, GPIO_PULL_DOWN }; - -struct gpio { - volatile uint32_t MODER, OTYPER, OSPEEDR, PUPDR, IDR, ODR, BSRR, LCKR, AFR[2]; -}; -#define GPIO(N) ((struct gpio *) (0x40020000 + 0x400 * (N))) - -static struct gpio *gpio_bank(uint16_t pin) { return GPIO(PINBANK(pin)); } -static inline void gpio_toggle(uint16_t pin) { - struct gpio *gpio = gpio_bank(pin); - uint32_t mask = BIT(PINNO(pin)); - gpio->BSRR = mask << (gpio->ODR & mask ? 16 : 0); -} -static inline int gpio_read(uint16_t pin) { - return gpio_bank(pin)->IDR & BIT(PINNO(pin)) ? 1 : 0; -} -static inline void gpio_write(uint16_t pin, bool val) { - struct gpio *gpio = gpio_bank(pin); - gpio->BSRR = BIT(PINNO(pin)) << (val ? 0 : 16); -} -static inline void gpio_init(uint16_t pin, uint8_t mode, uint8_t type, - uint8_t speed, uint8_t pull, uint8_t af) { - struct gpio *gpio = gpio_bank(pin); - uint8_t n = (uint8_t) (PINNO(pin)); - RCC->AHB1ENR |= BIT(PINBANK(pin)); // Enable GPIO clock - SETBITS(gpio->OTYPER, 1UL << n, ((uint32_t) type) << n); - SETBITS(gpio->OSPEEDR, 3UL << (n * 2), ((uint32_t) speed) << (n * 2)); - SETBITS(gpio->PUPDR, 3UL << (n * 2), ((uint32_t) pull) << (n * 2)); - SETBITS(gpio->AFR[n >> 3], 15UL << ((n & 7) * 4), - ((uint32_t) af) << ((n & 7) * 4)); - SETBITS(gpio->MODER, 3UL << (n * 2), ((uint32_t) mode) << (n * 2)); -} -static inline void gpio_input(uint16_t pin) { - gpio_init(pin, GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, - GPIO_PULL_NONE, 0); -} -static inline void gpio_output(uint16_t pin) { - gpio_init(pin, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, - GPIO_PULL_NONE, 0); -} - -struct syscfg { - volatile uint32_t MEMRMP, PMC, EXTICR[4], RESERVED[2], CMPCR; -}; -#define SYSCFG ((struct syscfg *) 0x40013800) - -struct exti { - volatile uint32_t IMR, EMR, RTSR, FTSR, SWIER, PR; -}; -#define EXTI ((struct exti *) 0x40013c00) - -static inline void irq_exti_attach(uint16_t pin) { - uint8_t bank = (uint8_t) (PINBANK(pin)), n = (uint8_t) (PINNO(pin)); - RCC->APB2ENR |= BIT(14); // Enable SYSCFG - SYSCFG->EXTICR[n / 4] &= ~(15UL << ((n % 4) * 4)); - SYSCFG->EXTICR[n / 4] |= (uint32_t) (bank << ((n % 4) * 4)); - EXTI->IMR |= BIT(n); - EXTI->RTSR |= BIT(n); - EXTI->FTSR |= BIT(n); - int irqvec = n < 5 ? 6 + n : n < 10 ? 23 : 40; // IRQ vector index, 10.1.2 - nvic_set_prio(irqvec, 3); - nvic_enable_irq(irqvec); -} - -struct uart { - volatile uint32_t CR1, CR2, CR3, BRR, GTPR, RTOR, RQR, ISR, ICR, RDR, TDR; -}; -#define UART1 ((struct uart *) 0x40011000) -#define UART2 ((struct uart *) 0x40004400) -#define UART3 ((struct uart *) 0x40004800) - -static inline void uart_init(struct uart *uart, unsigned long baud) { - // https://www.st.com/resource/en/datasheet/stm32f746zg.pdf - uint8_t af = 7; // Alternate function - uint16_t rx = 0, tx = 0; // pins - uint32_t freq = 0; // Bus frequency. UART1 is on APB2, rest on APB1 - - if (uart == UART1) freq = APB2_FREQUENCY, RCC->APB2ENR |= BIT(4); - if (uart == UART2) freq = APB1_FREQUENCY, RCC->APB1ENR |= BIT(17); - if (uart == UART3) freq = APB1_FREQUENCY, RCC->APB1ENR |= BIT(18); - - if (uart == UART1) tx = PIN('A', 9), rx = PIN('A', 10); - if (uart == UART2) tx = PIN('A', 2), rx = PIN('A', 3); - if (uart == UART3) tx = PIN('D', 8), rx = PIN('D', 9); - - gpio_init(tx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af); - gpio_init(rx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af); - uart->CR1 = 0; // Disable this UART - uart->BRR = freq / baud; // Set baud rate - uart->CR1 |= BIT(0) | BIT(2) | BIT(3); // Set UE, RE, TE -} -static inline void uart_write_byte(struct uart *uart, uint8_t byte) { - uart->TDR = byte; - while ((uart->ISR & BIT(7)) == 0) spin(1); -} -static inline void uart_write_buf(struct uart *uart, char *buf, size_t len) { - while (len-- > 0) uart_write_byte(uart, *(uint8_t *) buf++); -} -static inline int uart_read_ready(struct uart *uart) { - return uart->ISR & BIT(5); // If RXNE bit is set, data is ready -} -static inline uint8_t uart_read_byte(struct uart *uart) { - return (uint8_t) (uart->RDR & 255); -} - -static inline void clock_init(void) { // Set clock frequency -#if 0 - RCC->APB1ENR |= BIT(28); // Power enable - PWR->CR1 |= 3UL << 14; // Voltage regulator scale 3 - PWR->CR1 |= BIT(16); // Enable overdrive - while ((PWR->CSR1 & BIT(16)) == 0) spin(1); // Wait until done - PWR->CR1 |= BIT(17); // Enable overdrive switching - while ((PWR->CSR1 & BIT(17)) == 0) spin(1); // Wait until done -#endif - SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); // Enable FPU - asm ("DSB"); - asm ("ISB"); - FLASH->ACR |= FLASH_LATENCY | BIT(8) | BIT(9); // Flash latency, prefetch - RCC->PLLCFGR &= ~((BIT(17) - 1)); // Clear PLL multipliers - RCC->PLLCFGR |= (((PLL_P - 2) / 2) & 3) << 16; // Set PLL_P - RCC->PLLCFGR |= PLL_M | (PLL_N << 6); // Set PLL_M and PLL_N - RCC->CR |= BIT(24); // Enable PLL - while ((RCC->CR & BIT(25)) == 0) spin(1); // Wait until done - RCC->CFGR = (APB1_PRE << 10) | (APB2_PRE << 13); // Set prescalers - RCC->CFGR |= 2; // Set clock source to PLL - while ((RCC->CFGR & 12) == 0) spin(1); // Wait until done -} diff --git a/examples/stm32/nucleo-f746zg-freertos-mip/mongoose_custom.h b/examples/stm32/nucleo-f746zg-freertos-mip/mongoose_custom.h index ac68d15a..49e9e0b9 100644 --- a/examples/stm32/nucleo-f746zg-freertos-mip/mongoose_custom.h +++ b/examples/stm32/nucleo-f746zg-freertos-mip/mongoose_custom.h @@ -2,6 +2,8 @@ #include // we are not using lwIP +// See https://mongoose.ws/documentation/#build-options #define MG_ARCH MG_ARCH_FREERTOS #define MG_ENABLE_MIP 1 #define MG_IO_SIZE 256 +#define MG_ENABLE_CUSTOM_RANDOM 1 diff --git a/examples/stm32/nucleo-f746zg-freertos-mip/syscalls.c b/examples/stm32/nucleo-f746zg-freertos-mip/syscalls.c index e6bff652..be3210aa 100644 --- a/examples/stm32/nucleo-f746zg-freertos-mip/syscalls.c +++ b/examples/stm32/nucleo-f746zg-freertos-mip/syscalls.c @@ -1,6 +1,6 @@ #include -#include "mcu.h" +#include "hal.h" int _fstat(int fd, struct stat *st) { if (fd < 0) return -1; @@ -8,12 +8,6 @@ int _fstat(int fd, struct stat *st) { return 0; } -int _write(int fd, char *ptr, int len) { - (void) fd, (void) ptr, (void) len; - if (fd == 1) uart_write_buf(UART3, ptr, (size_t) len); - return len; -} - void *_sbrk(int incr) { extern char _end; static unsigned char *heap = NULL; @@ -24,6 +18,11 @@ void *_sbrk(int incr) { return prev_heap; } +int _open(const char *path) { + (void) path; + return -1; +} + int _close(int fd) { (void) fd; return -1; @@ -34,12 +33,53 @@ int _isatty(int fd) { return 1; } +int _lseek(int fd, int ptr, int dir) { + (void) fd, (void) ptr, (void) dir; + return 0; +} + +void _exit(int status) { + (void) status; + for (;;) asm volatile("BKPT #0"); +} + +void _kill(int pid, int sig) { + (void) pid, (void) sig; +} + +int _getpid(void) { + return -1; +} + +int _write(int fd, char *ptr, int len) { + (void) fd, (void) ptr, (void) len; + if (fd == 1) uart_write_buf(UART_DEBUG, ptr, (size_t) len); + return -1; +} + int _read(int fd, char *ptr, int len) { (void) fd, (void) ptr, (void) len; return -1; } -int _lseek(int fd, int ptr, int dir) { - (void) fd, (void) ptr, (void) dir; - return 0; +int _link(const char *a, const char *b) { + (void) a, (void) b; + return -1; } + +int _unlink(const char *a) { + (void) a; + return -1; +} + +int _stat(const char *path, struct stat *st) { + (void) path, (void) st; + return -1; +} + +int mkdir(const char *path, mode_t mode) { + (void) path, (void) mode; + return -1; +} + +void _init(void) {} diff --git a/examples/stm32/nucleo-f746zg-freertos-mip/sysinit.c b/examples/stm32/nucleo-f746zg-freertos-mip/sysinit.c new file mode 100644 index 00000000..5e65284e --- /dev/null +++ b/examples/stm32/nucleo-f746zg-freertos-mip/sysinit.c @@ -0,0 +1,29 @@ +// Copyright (c) 2023 Cesanta Software Limited +// All rights reserved +// +// This file contains essentials required by the CMSIS: +// uint32_t SystemCoreClock - holds the system core clock value +// SystemInit() - initialises the system, e.g. sets up clocks + +#include "hal.h" + +uint32_t SystemCoreClock = SYS_FREQUENCY; + +void SystemInit(void) { // Called automatically by startup code + SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); // Enable FPU + asm("DSB"); + asm("ISB"); + FLASH->ACR |= FLASH_LATENCY | BIT(8) | BIT(9); // Flash latency, prefetch + RCC->PLLCFGR &= ~((BIT(17) - 1)); // Clear PLL multipliers + RCC->PLLCFGR |= (((PLL_P - 2) / 2) & 3) << 16; // Set PLL_P + RCC->PLLCFGR |= PLL_M | (PLL_N << 6); // Set PLL_M and PLL_N + RCC->CR |= BIT(24); // Enable PLL + while ((RCC->CR & BIT(25)) == 0) spin(1); // Wait until done + RCC->CFGR = (APB1_PRE << 10) | (APB2_PRE << 13); // Set prescalers + RCC->CFGR |= 2; // Set clock source to PLL + while ((RCC->CFGR & 12) == 0) spin(1); // Wait until done + + RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN; // Enable SYSCFG + rng_init(); // Initialise random number generator + SysTick_Config(SystemCoreClock / 1000); // Sys tick every 1ms +} diff --git a/examples/ti/ek-tm4c1294xl-freertos-mip/main.c b/examples/ti/ek-tm4c1294xl-freertos-mip/main.c index c6a8bd4b..6ac10e46 100644 --- a/examples/ti/ek-tm4c1294xl-freertos-mip/main.c +++ b/examples/ti/ek-tm4c1294xl-freertos-mip/main.c @@ -32,7 +32,7 @@ static void ethernet_init(void) { GPIO_PULL_NONE, 5); // EN0LED1 gpio_init(LED4, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, GPIO_PULL_NONE, 5); // EN0LED0 - nvic_enable_irq(40); // Setup Ethernet IRQ handler + nvic_enable_irq(40); // Setup Ethernet IRQ handler // Initialize Ethernet clocks, see datasheet section 5 // Turn Flash Prefetch off (silicon errata ETH#02) volatile uint32_t *IMC = (uint32_t *) 0x400FD000; @@ -85,15 +85,15 @@ static void blinker(void *args) { for (;;) { gpio_toggle(LED1); vTaskDelay(pdMS_TO_TICKS(750)); - (void)args;//MG_INFO(("blink %s, RAM: %u", (char *) args, xPortGetFreeHeapSize())); + (void) args; // MG_INFO(("blink %s, RAM: %u", (char *) args, + // xPortGetFreeHeapSize())); } } int main(void) { - static struct uart *uart = UART0; // Use UART0 (attached to ICDI) - clock_init(); // Set clock to 120MHz - systick_init(FREQ / 1000); // Tick every 1 ms - uart_init(uart, 115200); // Initialise UART + clock_init(); // Set clock to 120MHz + systick_init(FREQ / 1000); // Tick every 1 ms + uart_init(UART_DEBUG, 115200); // Initialise UART xTaskCreate(blinker, "blinker", 128, ":)", configMAX_PRIORITIES - 1, NULL); xTaskCreate(server, "server", 2048, 0, configMAX_PRIORITIES - 1, NULL); vTaskStartScheduler(); // This blocks diff --git a/examples/ti/ek-tm4c1294xl-freertos-mip/mcu.h b/examples/ti/ek-tm4c1294xl-freertos-mip/mcu.h index 11dbd2c8..ece7b520 100644 --- a/examples/ti/ek-tm4c1294xl-freertos-mip/mcu.h +++ b/examples/ti/ek-tm4c1294xl-freertos-mip/mcu.h @@ -190,6 +190,10 @@ struct uart { #define UART0 USART(0) +#ifndef UART_DEBUG +#define UART_DEBUG UART0 +#endif + static inline void uart_init(struct uart *uart, unsigned long baud) { struct uarthw { uint16_t rx, tx; // pins diff --git a/examples/ti/ek-tm4c1294xl-freertos-mip/syscalls.c b/examples/ti/ek-tm4c1294xl-freertos-mip/syscalls.c index 917647fb..656d3954 100644 --- a/examples/ti/ek-tm4c1294xl-freertos-mip/syscalls.c +++ b/examples/ti/ek-tm4c1294xl-freertos-mip/syscalls.c @@ -8,12 +8,6 @@ int _fstat(int fd, struct stat *st) { return 0; } -int _write(int fd, char *ptr, int len) { - (void) fd, (void) ptr, (void) len; - if (fd == 1) uart_write_buf(UART0, ptr, (size_t) len); - return len; -} - void *_sbrk(int incr) { extern char _end; static unsigned char *heap = NULL; @@ -24,6 +18,11 @@ void *_sbrk(int incr) { return prev_heap; } +int _open(const char *path) { + (void) path; + return -1; +} + int _close(int fd) { (void) fd; return -1; @@ -34,12 +33,53 @@ int _isatty(int fd) { return 1; } +int _lseek(int fd, int ptr, int dir) { + (void) fd, (void) ptr, (void) dir; + return 0; +} + +void _exit(int status) { + (void) status; + for (;;) asm volatile("BKPT #0"); +} + +void _kill(int pid, int sig) { + (void) pid, (void) sig; +} + +int _getpid(void) { + return -1; +} + +int _write(int fd, char *ptr, int len) { + (void) fd, (void) ptr, (void) len; + if (fd == 1) uart_write_buf(UART_DEBUG, ptr, (size_t) len); + return -1; +} + int _read(int fd, char *ptr, int len) { (void) fd, (void) ptr, (void) len; return -1; } -int _lseek(int fd, int ptr, int dir) { - (void) fd, (void) ptr, (void) dir; - return 0; +int _link(const char *a, const char *b) { + (void) a, (void) b; + return -1; } + +int _unlink(const char *a) { + (void) a; + return -1; +} + +int _stat(const char *path, struct stat *st) { + (void) path, (void) st; + return -1; +} + +int mkdir(const char *path, mode_t mode) { + (void) path, (void) mode; + return -1; +} + +void _init(void) {} diff --git a/mip/driver_stm32.c b/mip/driver_stm32.c index def832d6..5f35a36a 100644 --- a/mip/driver_stm32.c +++ b/mip/driver_stm32.c @@ -193,7 +193,6 @@ static bool mip_driver_stm32_up(struct mip_if *ifp) { void ETH_IRQHandler(void); void ETH_IRQHandler(void) { - qp_mark(QP_IRQTRIGGERED, 0); if (ETH->DMASR & BIT(6)) { // Frame received, loop ETH->DMASR = BIT(16) | BIT(6); // Clear flag for (uint32_t i = 0; i < 10; i++) { // read as they arrive but not forever diff --git a/mip/driver_stm32h.c b/mip/driver_stm32h.c index a3979273..1694dfac 100644 --- a/mip/driver_stm32h.c +++ b/mip/driver_stm32h.c @@ -248,7 +248,6 @@ static bool mip_driver_stm32h_up(struct mip_if *ifp) { void ETH_IRQHandler(void); static uint32_t s_rxno; void ETH_IRQHandler(void) { - qp_mark(QP_IRQTRIGGERED, 0); if (ETH->DMACSR & BIT(6)) { // Frame received, loop ETH->DMACSR = BIT(15) | BIT(6); // Clear flag for (uint32_t i = 0; i < 10; i++) { // read as they arrive but not forever diff --git a/mip/driver_tm4c.c b/mip/driver_tm4c.c index 1b06bbd2..094f25c9 100644 --- a/mip/driver_tm4c.c +++ b/mip/driver_tm4c.c @@ -226,7 +226,6 @@ static bool mip_driver_tm4c_up(struct mip_if *ifp) { void EMAC0_IRQHandler(void); static uint32_t s_rxno; void EMAC0_IRQHandler(void) { - qp_mark(QP_IRQTRIGGERED, 0); if (EMAC->EMACDMARIS & BIT(6)) { // Frame received, loop EMAC->EMACDMARIS = BIT(16) | BIT(6); // Clear flag for (uint32_t i = 0; i < 10; i++) { // read as they arrive but not forever diff --git a/mip/mip.c b/mip/mip.c index c7fcf056..b186b8f5 100644 --- a/mip/mip.c +++ b/mip/mip.c @@ -2,14 +2,9 @@ #if MG_ENABLE_MIP -#define MIP_ETHEMERAL_PORT 49152 -#define U16(ptr) ((((uint16_t) (ptr)[0]) << 8) | (ptr)[1]) +#define MIP_EPHEMERAL_PORT 49152 #define PDIFF(a, b) ((size_t) (((char *) (b)) - ((char *) (a)))) -#ifndef MIP_QSIZE -#define MIP_QSIZE (16 * 1024) // Queue size -#endif - #ifndef MIP_TCP_KEEPALIVE_MS #define MIP_TCP_KEEPALIVE_MS 45000 // TCP keep-alive period, ms #endif @@ -158,12 +153,6 @@ static bool q_write(struct queue *q, const void *buf, size_t len) { return success; } -#ifdef MIP_QPROFILE -static inline size_t q_space(struct queue *q) { - return q->tail > q->head ? q->tail - q->head : q->tail + (q->len - q->head); -} -#endif - static inline size_t q_avail(struct queue *q) { size_t n = 0; if (q->tail != q->head) q_copyout(q, (uint8_t *) &n, sizeof(n), q->tail); @@ -204,58 +193,6 @@ static uint16_t ipcsum(const void *buf, size_t len) { return csumfin(sum); } -// ARP cache is organised as a doubly linked list. A successful cache lookup -// moves an entry to the head of the list. New entries are added by replacing -// the last entry in the list with a new IP/MAC. -// ARP cache format: | prev | next | Entry0 | Entry1 | .... | EntryN | -// ARP entry format: | prev | next | IP (4bytes) | MAC (6bytes) | -// prev and next are 1-byte offsets in the cache, so cache size is max 256 bytes -// ARP entry size is 12 bytes -static void arp_cache_init(uint8_t *p, int n, int size) { - for (int i = 0; i < n; i++) p[2 + i * size] = (uint8_t) (2 + (i - 1) * size); - for (int i = 0; i < n; i++) p[3 + i * size] = (uint8_t) (2 + (i + 1) * size); - p[0] = p[2] = (uint8_t) (2 + (n - 1) * size); - p[1] = p[3 + (n - 1) * size] = 2; -} - -#if 0 -static inline void arp_cache_dump(const uint8_t *p) { - MG_INFO(("ARP cache:")); - for (uint8_t i = 0, j = p[1]; i < MIP_ARP_ENTRIES; i++, j = p[j + 1]) { - MG_INFO((" %M -> %M", mg_print_ip4, &p[j + 2], mg_print_mac, &p[j + 6])); - } -} -#endif - -static const uint8_t bcastmac[6] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; - -static uint8_t *arp_cache_find(struct mip_if *ifp, uint32_t ip) { - uint8_t *p = ifp->arp_cache; - if (ip == 0) return NULL; - // use broadcast MAC for local and global broadcast IP - if (ip == 0xffffffffU || ip == (ifp->ip | ~ifp->mask)) - return (uint8_t *) bcastmac; - for (uint8_t i = 0, j = p[1]; i < MIP_ARP_ENTRIES; i++, j = p[j + 1]) { - if (memcmp(p + j + 2, &ip, sizeof(ip)) == 0) { - p[1] = j, p[0] = p[j]; // Found entry! Point list head to us - // MG_DEBUG(("ARP find: %M @ %M", mg_print_ip4, &ip, mg_print_mac, &p[j + - // 6])); - return p + j + 6; // And return MAC address - } - } - return NULL; -} - -static void arp_cache_add(struct mip_if *ifp, uint32_t ip, uint8_t mac[6]) { - uint8_t *p = ifp->arp_cache; - if (ip == 0 || ip == ~0U) return; // Bad IP - if (arp_cache_find(ifp, ip) != NULL) return; // Already exists, do nothing - memcpy(p + p[0] + 2, &ip, sizeof(ip)); // Replace last entry: IP address - memcpy(p + p[0] + 6, mac, 6); // And MAC address - p[1] = p[0], p[0] = p[p[1]]; // Point list head to us - MG_DEBUG(("ARP cache: added %M @ %M", mg_print_ip4, &ip, mg_print_mac, mac)); -} - static size_t ether_output(struct mip_if *ifp, size_t len) { // size_t min = 64; // Pad short frames to 64 bytes (minimum Ethernet size) // if (len < min) memset(ifp->tx.ptr + len, 0, min - len), len = min; @@ -295,18 +232,12 @@ static void onstatechange(struct mip_if *ifp) { } } -static struct ip *tx_ip(struct mip_if *ifp, uint8_t proto, uint32_t ip_src, - uint32_t ip_dst, size_t plen) { +static struct ip *tx_ip(struct mip_if *ifp, uint8_t *mac_dst, uint8_t proto, + uint32_t ip_src, uint32_t ip_dst, size_t plen) { struct eth *eth = (struct eth *) ifp->tx.ptr; struct ip *ip = (struct ip *) (eth + 1); - uint8_t *mac = arp_cache_find(ifp, ip_dst); // Dst IP in ARP cache ? - if (!mac && ((ip_dst & ifp->mask) == (ifp->ip & ifp->mask))) - arp_ask(ifp, ip_dst); // Same net, lookup - if (!mac) mac = arp_cache_find(ifp, ifp->gw); // Use gateway MAC - if (!mac) arp_ask(ifp, ifp->gw); // Not found? lookup - if (mac) memcpy(eth->dst, mac, sizeof(eth->dst)); // Found? Use it - if (!mac) memset(eth->dst, 255, sizeof(eth->dst)); // No? Use broadcast - memcpy(eth->src, ifp->mac, sizeof(eth->src)); // TODO(cpq): ARP lookup + memcpy(eth->dst, mac_dst, sizeof(eth->dst)); + memcpy(eth->src, ifp->mac, sizeof(eth->src)); // Use our MAC eth->type = mg_htons(0x800); memset(ip, 0, sizeof(*ip)); ip->ver = 0x45; // Version 4, header length 5 words @@ -320,10 +251,11 @@ static struct ip *tx_ip(struct mip_if *ifp, uint8_t proto, uint32_t ip_src, return ip; } -static void tx_udp(struct mip_if *ifp, uint32_t ip_src, uint16_t sport, - uint32_t ip_dst, uint16_t dport, const void *buf, - size_t len) { - struct ip *ip = tx_ip(ifp, 17, ip_src, ip_dst, len + sizeof(struct udp)); +static void tx_udp(struct mip_if *ifp, uint8_t *mac_dst, uint32_t ip_src, + uint16_t sport, uint32_t ip_dst, uint16_t dport, + const void *buf, size_t len) { + struct ip *ip = + tx_ip(ifp, mac_dst, 17, ip_src, ip_dst, len + sizeof(struct udp)); struct udp *udp = (struct udp *) (ip + 1); // MG_DEBUG(("UDP XX LEN %d %d", (int) len, (int) ifp->tx.len)); udp->sport = sport; @@ -341,17 +273,19 @@ static void tx_udp(struct mip_if *ifp, uint32_t ip_src, uint16_t sport, ether_output(ifp, sizeof(struct eth) + sizeof(*ip) + sizeof(*udp) + len); } -static void tx_dhcp(struct mip_if *ifp, uint32_t src, uint32_t dst, - uint8_t *opts, size_t optslen) { +static void tx_dhcp(struct mip_if *ifp, uint8_t *mac_dst, uint32_t ip_src, + uint32_t ip_dst, uint8_t *opts, size_t optslen) { struct dhcp dhcp = {1, 1, 6, 0, 0, 0, 0, 0, 0, 0, 0, {0}, 0, {0}}; dhcp.magic = mg_htonl(0x63825363); memcpy(&dhcp.hwaddr, ifp->mac, sizeof(ifp->mac)); memcpy(&dhcp.xid, ifp->mac + 2, sizeof(dhcp.xid)); memcpy(&dhcp.options, opts, optslen); - tx_udp(ifp, src, mg_htons(68), dst, mg_htons(67), &dhcp, sizeof(dhcp)); + tx_udp(ifp, mac_dst, ip_src, mg_htons(68), ip_dst, mg_htons(67), &dhcp, + sizeof(dhcp)); } -static void tx_dhcp_request(struct mip_if *ifp, uint32_t src, uint32_t dst) { +static void tx_dhcp_request(struct mip_if *ifp, uint8_t *mac_dst, + uint32_t ip_src, uint32_t ip_dst) { uint8_t opts[] = { 53, 1, 3, // Type: DHCP request 55, 2, 1, 3, // GW and mask @@ -360,26 +294,39 @@ static void tx_dhcp_request(struct mip_if *ifp, uint32_t src, uint32_t dst) { 50, 4, 0, 0, 0, 0, // Requested IP 255 // End of options }; - memcpy(opts + 14, &dst, sizeof(dst)); - memcpy(opts + 20, &src, sizeof(src)); - tx_dhcp(ifp, src, dst, opts, sizeof(opts)); + memcpy(opts + 14, &ip_dst, sizeof(ip_dst)); + memcpy(opts + 20, &ip_src, sizeof(ip_src)); + tx_dhcp(ifp, mac_dst, ip_src, ip_dst, opts, sizeof(opts)); } static void tx_dhcp_discover(struct mip_if *ifp) { + uint8_t mac[6] = {255, 255, 255, 255, 255, 255}; uint8_t opts[] = { 53, 1, 1, // Type: DHCP discover 55, 2, 1, 3, // Parameters: ip, mask 255 // End of options }; - tx_dhcp(ifp, 0, 0xffffffff, opts, sizeof(opts)); + tx_dhcp(ifp, mac, 0, 0xffffffff, opts, sizeof(opts)); MG_DEBUG(("DHCP discover sent")); } +static struct mg_connection *getpeer(struct mg_mgr *mgr, struct pkt *pkt, + bool lsn) { + struct mg_connection *c = NULL; + for (c = mgr->conns; c != NULL; c = c->next) { + if (c->is_udp && pkt->udp && c->loc.port == pkt->udp->dport) break; + if (!c->is_udp && pkt->tcp && c->loc.port == pkt->tcp->dport && + lsn == c->is_listening && (lsn || c->rem.port == pkt->tcp->sport)) + break; + } + return c; +} + static void rx_arp(struct mip_if *ifp, struct pkt *pkt) { if (pkt->arp->op == mg_htons(1) && pkt->arp->tpa == ifp->ip) { // ARP request. Make a response, then send - MG_DEBUG(("ARP op %d %M: %M?", mg_ntohs(pkt->arp->op), mg_print_ip4, - &pkt->arp->spa, mg_print_ip4, &pkt->arp->tpa)); + // MG_DEBUG(("ARP op %d %M: %M", mg_ntohs(pkt->arp->op), mg_print_ip4, + // &pkt->arp->spa, mg_print_ip4, &pkt->arp->tpa)); struct eth *eth = (struct eth *) ifp->tx.ptr; struct arp *arp = (struct arp *) (eth + 1); memcpy(eth->dst, pkt->eth->src, sizeof(eth->dst)); @@ -391,12 +338,24 @@ static void rx_arp(struct mip_if *ifp, struct pkt *pkt) { memcpy(arp->sha, ifp->mac, sizeof(pkt->arp->sha)); arp->tpa = pkt->arp->spa; arp->spa = ifp->ip; - MG_DEBUG(("ARP response: we're %M", mg_print_ip4, &ifp->ip)); + MG_DEBUG(("ARP: tell %M we're %M", mg_print_ip4, &arp->tpa, mg_print_ip4, + &ifp->ip)); ether_output(ifp, PDIFF(eth, arp + 1)); } else if (pkt->arp->op == mg_htons(2)) { if (memcmp(pkt->arp->tha, ifp->mac, sizeof(pkt->arp->tha)) != 0) return; - // MG_INFO(("ARP RESPONSE")); - arp_cache_add(ifp, pkt->arp->spa, pkt->arp->sha); + if (pkt->arp->spa == ifp->gw) { + // Got response for the GW ARP request. Set ifp->gwmac + memcpy(ifp->gwmac, pkt->arp->sha, sizeof(ifp->gwmac)); + } else { + struct mg_connection *c = getpeer(ifp->mgr, pkt, false); + if (c != NULL && c->is_arplooking) { + struct connstate *s = (struct connstate *) (c + 1); + memcpy(s->mac, pkt->arp->sha, sizeof(s->mac)); + MG_DEBUG(("%lu ARP resolved %M -> %M", c->id, mg_print_ip4, &c->rem.ip, + mg_print_mac, s->mac)); + c->is_arplooking = 0; + } + } } } @@ -406,8 +365,8 @@ static void rx_icmp(struct mip_if *ifp, struct pkt *pkt) { size_t hlen = sizeof(struct eth) + sizeof(struct ip) + sizeof(struct icmp); size_t space = ifp->tx.len - hlen, plen = pkt->pay.len; if (plen > space) plen = space; - struct ip *ip = - tx_ip(ifp, 1, ifp->ip, pkt->ip->src, sizeof(struct icmp) + plen); + struct ip *ip = tx_ip(ifp, pkt->eth->src, 1, ifp->ip, pkt->ip->src, + sizeof(struct icmp) + plen); struct icmp *icmp = (struct icmp *) (ip + 1); memset(icmp, 0, sizeof(*icmp)); // Set csum to 0 memcpy(icmp + 1, pkt->pay.ptr, plen); // Copy RX payload to TX @@ -435,11 +394,11 @@ static void rx_dhcp_client(struct mip_if *ifp, struct pkt *pkt) { p += p[1] + 2; } if (ip && mask && gw && ifp->ip == 0) { - arp_cache_add(ifp, pkt->dhcp->siaddr, ((struct eth *) pkt->raw.ptr)->src); + memcpy(ifp->gwmac, pkt->eth->src, sizeof(ifp->gwmac)); ifp->ip = ip, ifp->gw = gw, ifp->mask = mask; ifp->state = MIP_STATE_READY; onstatechange(ifp); - tx_dhcp_request(ifp, ip, pkt->dhcp->siaddr); + tx_dhcp_request(ifp, pkt->eth->src, ip, pkt->dhcp->siaddr); } } @@ -474,24 +433,12 @@ static void rx_dhcp_server(struct mip_if *ifp, struct pkt *pkt) { memcpy(&res.options, opts, sizeof(opts)); res.magic = pkt->dhcp->magic; res.xid = pkt->dhcp->xid; - arp_cache_add(ifp, res.yiaddr, pkt->eth->src); - tx_udp(ifp, ifp->ip, mg_htons(67), op == 1 ? ~0U : res.yiaddr, mg_htons(68), - &res, sizeof(res)); + // memcpy(ifp->gwmac, pkt->eth->src, sizeof(ifp->gwmac)); + tx_udp(ifp, pkt->eth->src, ifp->ip, mg_htons(67), + op == 1 ? ~0U : res.yiaddr, mg_htons(68), &res, sizeof(res)); } } -static struct mg_connection *getpeer(struct mg_mgr *mgr, struct pkt *pkt, - bool lsn) { - struct mg_connection *c = NULL; - for (c = mgr->conns; c != NULL; c = c->next) { - if (c->is_udp && pkt->udp && c->loc.port == pkt->udp->dport) break; - if (!c->is_udp && pkt->tcp && c->loc.port == pkt->tcp->dport && - lsn == c->is_listening && (lsn || c->rem.port == pkt->tcp->sport)) - break; - } - return c; -} - static void rx_udp(struct mip_if *ifp, struct pkt *pkt) { struct mg_connection *c = getpeer(ifp->mgr, pkt, true); if (c == NULL) { @@ -512,10 +459,11 @@ static void rx_udp(struct mip_if *ifp, struct pkt *pkt) { } } -static size_t tx_tcp(struct mip_if *ifp, uint32_t dst_ip, uint8_t flags, - uint16_t sport, uint16_t dport, uint32_t seq, uint32_t ack, - const void *buf, size_t len) { - struct ip *ip = tx_ip(ifp, 6, ifp->ip, dst_ip, sizeof(struct tcp) + len); +static size_t tx_tcp(struct mip_if *ifp, uint8_t *dst_mac, uint32_t dst_ip, + uint8_t flags, uint16_t sport, uint16_t dport, + uint32_t seq, uint32_t ack, const void *buf, size_t len) { + struct ip *ip = + tx_ip(ifp, dst_mac, 6, ifp->ip, dst_ip, sizeof(struct tcp) + len); struct tcp *tcp = (struct tcp *) (ip + 1); memset(tcp, 0, sizeof(*tcp)); if (buf != NULL && len) memmove(tcp + 1, buf, len); @@ -540,8 +488,9 @@ static size_t tx_tcp(struct mip_if *ifp, uint32_t dst_ip, uint8_t flags, static size_t tx_tcp_pkt(struct mip_if *ifp, struct pkt *pkt, uint8_t flags, uint32_t seq, const void *buf, size_t len) { uint32_t delta = (pkt->tcp->flags & (TH_SYN | TH_FIN)) ? 1 : 0; - return tx_tcp(ifp, pkt->ip->src, flags, pkt->tcp->dport, pkt->tcp->sport, seq, - mg_htonl(mg_ntohl(pkt->tcp->seq) + delta), buf, len); + return tx_tcp(ifp, pkt->eth->src, pkt->ip->src, flags, pkt->tcp->dport, + pkt->tcp->sport, seq, mg_htonl(mg_ntohl(pkt->tcp->seq) + delta), + buf, len); } static void settmout(struct mg_connection *c, uint8_t type) { @@ -558,6 +507,7 @@ static struct mg_connection *accept_conn(struct mg_connection *lsn, struct mg_connection *c = mg_alloc_conn(lsn->mgr); struct connstate *s = (struct connstate *) (c + 1); s->seq = mg_ntohl(pkt->tcp->ack), s->ack = mg_ntohl(pkt->tcp->seq); + memcpy(s->mac, pkt->eth->src, sizeof(s->mac)); settmout(c, MIP_TTYPE_KEEPALIVE); c->rem.ip = pkt->ip->src; c->rem.port = pkt->tcp->sport; @@ -580,7 +530,7 @@ long mg_io_send(struct mg_connection *c, const void *buf, size_t len) { struct connstate *s = (struct connstate *) (c + 1); size_t max_headers_len = 14 + 24 /* max IP */ + 60 /* max TCP */; if (len + max_headers_len > ifp->tx.len) len = ifp->tx.len - max_headers_len; - if (tx_tcp(ifp, c->rem.ip, TH_PUSH | TH_ACK, c->loc.port, c->rem.port, + if (tx_tcp(ifp, s->mac, c->rem.ip, TH_PUSH | TH_ACK, c->loc.port, c->rem.port, mg_htonl(s->seq), mg_htonl(s->ack), buf, len) > 0) { s->seq += (uint32_t) len; if (s->ttype == MIP_TTYPE_ACK) settmout(c, MIP_TTYPE_KEEPALIVE); @@ -825,20 +775,14 @@ static void mip_poll(struct mip_if *ifp, uint64_t uptime_ms) { } } if (ifp->state == MIP_STATE_DOWN) return; - // if (expired_1000ms) arp_cache_dump(ifp->arp_cache); - if (ifp->ip == 0 && expired_1000ms) { - tx_dhcp_discover(ifp); // If IP not configured, send DHCP - } else if (ifp->enable_dhcp_client == false && expired_1000ms && ifp->gw && - arp_cache_find(ifp, ifp->gw) == NULL) { - arp_ask(ifp, ifp->gw); // If GW's MAC address in not in ARP cache - } + // If IP not configured, send DHCP + if (ifp->ip == 0 && expired_1000ms) tx_dhcp_discover(ifp); // Read data from the network size_t len = ifp->driver->rx((void *) ifp->rx.ptr, ifp->rx.len, ifp); if (len) { mip_rx(ifp, (void *) ifp->rx.ptr, len); - qp_mark(QP_FRAMEDONE, (int) q_space(&ifp->queue)); } // Process timeouts @@ -849,23 +793,20 @@ static void mip_poll(struct mip_if *ifp, uint64_t uptime_ms) { if (uptime_ms > s->timer) { if (s->ttype == MIP_TTYPE_ACK) { MG_DEBUG(("%lu ack %x %x", c->id, s->seq, s->ack)); - tx_tcp(ifp, c->rem.ip, TH_ACK, c->loc.port, c->rem.port, + tx_tcp(ifp, s->mac, c->rem.ip, TH_ACK, c->loc.port, c->rem.port, mg_htonl(s->seq), mg_htonl(s->ack), "", 0); } else { if (s->tmiss++ > 2) { mg_error(c, "keepalive"); } else { MG_DEBUG(("%lu keepalive", c->id)); - tx_tcp(ifp, c->rem.ip, TH_ACK, c->loc.port, c->rem.port, + tx_tcp(ifp, s->mac, c->rem.ip, TH_ACK, c->loc.port, c->rem.port, mg_htonl(s->seq - 1), mg_htonl(s->ack), "", 0); } } settmout(c, MIP_TTYPE_KEEPALIVE); } } -#ifdef MIP_QPROFILE - qp_log(); -#endif } // This function executes in interrupt context, thus it should copy data @@ -873,21 +814,14 @@ static void mip_poll(struct mip_if *ifp, uint64_t uptime_ms) { // our lock-free queue with preallocated buffer to copy data and return asap void mip_qwrite(void *buf, size_t len, struct mip_if *ifp) { if (q_write(&ifp->queue, buf, len)) { - qp_mark(QP_FRAMEPUSHED, (int) q_space(&ifp->queue)); ifp->nrecv++; } else { - ifp->ndropped++; - qp_mark(QP_FRAMEDROPPED, ifp->dropped); - MG_ERROR(("dropped %d", (int) len)); + ifp->ndrop++; } } size_t mip_qread(void *buf, struct mip_if *ifp) { - size_t len = q_read(&ifp->queue, buf); - if (len) { - qp_mark(QP_FRAMEPOPPED, (int) q_space(&ifp->queue)); - } - return len; + return q_read(&ifp->queue, buf); } size_t mip_driver_rx(void *buf, size_t len, struct mip_if *ifp) { @@ -900,7 +834,7 @@ void mip_init(struct mg_mgr *mgr, struct mip_if *ifp) { if (ifp->mac[0] == 0 && ifp->mac[1] == 0 && ifp->mac[2] == 0 && ifp->mac[3] == 0 && ifp->mac[4] == 0 && ifp->mac[5] == 0) { mg_random(ifp->mac, sizeof(ifp->mac)); - ifp->mac[0] &= (uint8_t) ~1; // 1st byte must be even (unicast) + ifp->mac[0] &= (uint8_t) ~1; // Clear bit 0. 1st byte is even (unicast) MG_INFO(("MAC not set. Generated random: %M", mg_print_mac, ifp->mac)); } @@ -912,20 +846,17 @@ void mip_init(struct mg_mgr *mgr, struct mip_if *ifp) { ifp->tx.ptr = (char *) calloc(1, maxpktsize), ifp->tx.len = maxpktsize; if (ifp->queue.len) ifp->queue.buf = (uint8_t *) calloc(1, ifp->queue.len); ifp->timer_1000ms = mg_millis(); - arp_cache_init(ifp->arp_cache, MIP_ARP_ENTRIES, 12); mgr->priv = ifp; ifp->mgr = mgr; mgr->extraconnsize = sizeof(struct connstate); if (ifp->ip == 0) ifp->enable_dhcp_client = true; + memset(ifp->gwmac, 255, sizeof(ifp->gwmac)); // Set to broadcast // Randomise initial ephemeral port uint16_t jitter; mg_random(&jitter, sizeof(jitter)); - ifp->eport = MIP_ETHEMERAL_PORT + (jitter % (0xffffu - MIP_ETHEMERAL_PORT)); - -#ifdef MIP_QPROFILE - qp_init(); -#endif + ifp->eport = MIP_EPHEMERAL_PORT + + (uint16_t) (jitter % (0xffffu - MIP_EPHEMERAL_PORT)); } } @@ -940,21 +871,37 @@ int mg_mkpipe(struct mg_mgr *m, mg_event_handler_t fn, void *d, bool udp) { return -1; } +static void send_syn(struct mg_connection *c) { + struct connstate *s = (struct connstate *) (c + 1); + uint32_t isn = mg_htonl((uint32_t) mg_ntohs(c->loc.port)); + struct mip_if *ifp = (struct mip_if *) c->mgr->priv; + tx_tcp(ifp, s->mac, c->rem.ip, TH_SYN, c->loc.port, c->rem.port, isn, 0, NULL, + 0); +} + void mg_connect_resolved(struct mg_connection *c) { struct mip_if *ifp = (struct mip_if *) c->mgr->priv; c->is_resolving = 0; - if (ifp->eport < MIP_ETHEMERAL_PORT) ifp->eport = MIP_ETHEMERAL_PORT; + if (ifp->eport < MIP_EPHEMERAL_PORT) ifp->eport = MIP_EPHEMERAL_PORT; c->loc.ip = ifp->ip; c->loc.port = mg_htons(ifp->eport++); MG_DEBUG(("%lu %M -> %M", c->id, mg_print_ip_port, &c->loc, mg_print_ip_port, &c->rem)); mg_call(c, MG_EV_RESOLVE, NULL); - if (c->is_udp) { - mg_call(c, MG_EV_CONNECT, NULL); + if (((c->rem.ip & ifp->mask) == (ifp->ip & ifp->mask))) { + // If we're in the same LAN, fire an ARP lookup. TODO(cpq): handle this! + MG_DEBUG(("%lu ARP lookup...", c->id)); + arp_ask(ifp, c->rem.ip); + c->is_arplooking = 1; } else { - uint32_t isn = mg_htonl((uint32_t) mg_ntohs(c->loc.port)); - tx_tcp(ifp, c->rem.ip, TH_SYN, c->loc.port, c->rem.port, isn, 0, NULL, 0); - c->is_connecting = 1; + struct connstate *s = (struct connstate *) (c + 1); + memcpy(s->mac, ifp->gwmac, sizeof(ifp->gwmac)); + if (c->is_udp) { + mg_call(c, MG_EV_CONNECT, NULL); + } else { + send_syn(c); + c->is_connecting = 1; + } } } @@ -977,7 +924,7 @@ static void close_conn(struct mg_connection *c) { mg_iobuf_free(&s->raw); // For TLS connections, release raw data if (c->is_udp == false && c->is_listening == false) { // For TCP conns, struct mip_if *ifp = (struct mip_if *) c->mgr->priv; // send TCP FIN - tx_tcp(ifp, c->rem.ip, TH_FIN | TH_ACK, c->loc.port, c->rem.port, + tx_tcp(ifp, s->mac, c->rem.ip, TH_FIN | TH_ACK, c->loc.port, c->rem.port, mg_htonl(s->seq), mg_htonl(s->ack), NULL, 0); } mg_close_conn(c); @@ -985,7 +932,7 @@ static void close_conn(struct mg_connection *c) { static bool can_write(struct mg_connection *c) { return c->is_connecting == 0 && c->is_resolving == 0 && c->send.len > 0 && - c->is_tls_hs == 0; + c->is_tls_hs == 0 && c->is_arplooking == 0; } void mg_mgr_poll(struct mg_mgr *mgr, int ms) { @@ -1013,54 +960,12 @@ bool mg_send(struct mg_connection *c, const void *buf, size_t len) { if (ifp->ip == 0 || ifp->state != MIP_STATE_READY) { mg_error(c, "net down"); } else if (c->is_udp) { - tx_udp(ifp, ifp->ip, c->loc.port, c->rem.ip, c->rem.port, buf, len); + struct connstate *s = (struct connstate *) (c + 1); + tx_udp(ifp, s->mac, ifp->ip, c->loc.port, c->rem.ip, c->rem.port, buf, len); res = true; } else { res = mg_iobuf_add(&c->send, c->send.len, buf, len); } return res; } - -#ifdef MIP_QPROFILE - -#pragma pack(push, 1) -struct qpentry { - uint32_t timestamp; - uint16_t type; - uint16_t len; -}; -#pragma pack(pop) - -static struct queue qp; - -// This is called from IRQ and main contexts; two producers, single consumer -// TODO(scaprile): avoid concurrency issues (2 queues ?) -void qp_mark(unsigned int type, int len) { - static bool ovf = false; - static uint16_t irq_ctr = 0, drop_ctr = 0; - struct qpentry e = {.timestamp = (uint32_t) mg_millis(), - .type = (uint16_t) type, - .len = (uint16_t) len}; - if (type == QP_IRQTRIGGERED) e.len = ++irq_ctr; - if (ovf) { - e.type = (uint16_t) QP_QUEUEOVF; - e.len = drop_ctr; - } - ovf = !q_write(&qp, &e, sizeof(e)); -} - -void qp_log(void) { - struct qpentry e; - const char *titles[] = {"IRQ ", "PUSH", "POP ", "DONE", "DROP", "OVFL"}; - for (int i = 0; i < 10 && q_read(&qp, &e); i++) { - MG_INFO(("%lx %s %u", e.timestamp, titles[e.type], e.len)); - } -} - -void qp_init(void) { - qp.len = 500 * (sizeof(size_t) + sizeof(struct qpentry)); - qp.buf = calloc(1, qp.len); // THERE IS NO FREE -} -#endif // MIP_QPROFILE - #endif // MG_ENABLE_MIP diff --git a/mip/mip.h b/mip/mip.h index 3584f7ef..67148770 100644 --- a/mip/mip.h +++ b/mip/mip.h @@ -21,9 +21,6 @@ struct queue { volatile size_t tail, head; }; -#define MIP_ARP_ENTRIES 5 // Number of ARP cache entries. Maximum 21 -#define MIP_ARP_CS (2 + 12 * MIP_ARP_ENTRIES) // ARP cache size - // Network interface struct mip_if { uint8_t mac[6]; // MAC address. Must be set to a valid MAC @@ -38,19 +35,19 @@ struct mip_if { struct queue queue; // Set queue.len for interrupt based drivers // Internal state, user can use it but should not change it - uint64_t now; // Current time - uint64_t timer_1000ms; // 1000 ms timer: for DHCP and link state - uint64_t lease_expire; // Lease expiration time - uint8_t arp_cache[MIP_ARP_CS]; // Each entry is 12 bytes - uint16_t eport; // Next ephemeral port - volatile uint32_t ndropped; // Number of received, but dropped frames - volatile uint32_t nrecv; // Number of received frames - volatile uint32_t nsent; // Number of transmitted frames - volatile uint32_t nerr; // Number of driver errors - uint8_t state; // Current state -#define MIP_STATE_DOWN 0 // Interface is down -#define MIP_STATE_UP 1 // Interface is up -#define MIP_STATE_READY 2 // Interface is up and has IP + uint8_t gwmac[6]; // Router's MAC + uint64_t now; // Current time + uint64_t timer_1000ms; // 1000 ms timer: for DHCP and link state + uint64_t lease_expire; // Lease expiration time + uint16_t eport; // Next ephemeral port + volatile uint32_t ndrop; // Number of received, but dropped frames + volatile uint32_t nrecv; // Number of received frames + volatile uint32_t nsent; // Number of transmitted frames + volatile uint32_t nerr; // Number of driver errors + uint8_t state; // Current state +#define MIP_STATE_DOWN 0 // Interface is down +#define MIP_STATE_UP 1 // Interface is up +#define MIP_STATE_READY 2 // Interface is up and has IP }; void mip_init(struct mg_mgr *, struct mip_if *); @@ -80,20 +77,3 @@ struct mip_spi { #define MG_ENABLE_DRIVER_STM32 0 #endif #endif - -#ifdef MIP_QPROFILE -enum { - QP_IRQTRIGGERED = 0, // payload is number of interrupts so far - QP_FRAMEPUSHED, // available space in the frame queue - QP_FRAMEPOPPED, // available space in the frame queue - QP_FRAMEDONE, // available space in the frame queue - QP_FRAMEDROPPED, // number of dropped frames - QP_QUEUEOVF // profiling queue is full, payload is number of frame drops -}; - -void qp_mark(unsigned int type, int len); -void qp_log(void); // timestamp, type, payload -void qp_init(void); -#else -#define qp_mark(a, b) -#endif diff --git a/mongoose.c b/mongoose.c index 2cc8667d..9b58c1cc 100644 --- a/mongoose.c +++ b/mongoose.c @@ -6132,7 +6132,6 @@ static bool mip_driver_stm32_up(struct mip_if *ifp) { void ETH_IRQHandler(void); void ETH_IRQHandler(void) { - qp_mark(QP_IRQTRIGGERED, 0); if (ETH->DMASR & BIT(6)) { // Frame received, loop ETH->DMASR = BIT(16) | BIT(6); // Clear flag for (uint32_t i = 0; i < 10; i++) { // read as they arrive but not forever @@ -6410,7 +6409,6 @@ static bool mip_driver_stm32h_up(struct mip_if *ifp) { void ETH_IRQHandler(void); static uint32_t s_rxno; void ETH_IRQHandler(void) { - qp_mark(QP_IRQTRIGGERED, 0); if (ETH->DMACSR & BIT(6)) { // Frame received, loop ETH->DMACSR = BIT(15) | BIT(6); // Clear flag for (uint32_t i = 0; i < 10; i++) { // read as they arrive but not forever @@ -6668,7 +6666,6 @@ static bool mip_driver_tm4c_up(struct mip_if *ifp) { void EMAC0_IRQHandler(void); static uint32_t s_rxno; void EMAC0_IRQHandler(void) { - qp_mark(QP_IRQTRIGGERED, 0); if (EMAC->EMACDMARIS & BIT(6)) { // Frame received, loop EMAC->EMACDMARIS = BIT(16) | BIT(6); // Clear flag for (uint32_t i = 0; i < 10; i++) { // read as they arrive but not forever @@ -6792,14 +6789,9 @@ struct mip_driver mip_driver_w5500 = {w5500_init, w5500_tx, w5500_rx, w5500_up}; #if MG_ENABLE_MIP -#define MIP_ETHEMERAL_PORT 49152 -#define U16(ptr) ((((uint16_t) (ptr)[0]) << 8) | (ptr)[1]) +#define MIP_EPHEMERAL_PORT 49152 #define PDIFF(a, b) ((size_t) (((char *) (b)) - ((char *) (a)))) -#ifndef MIP_QSIZE -#define MIP_QSIZE (16 * 1024) // Queue size -#endif - #ifndef MIP_TCP_KEEPALIVE_MS #define MIP_TCP_KEEPALIVE_MS 45000 // TCP keep-alive period, ms #endif @@ -6948,12 +6940,6 @@ static bool q_write(struct queue *q, const void *buf, size_t len) { return success; } -#ifdef MIP_QPROFILE -static inline size_t q_space(struct queue *q) { - return q->tail > q->head ? q->tail - q->head : q->tail + (q->len - q->head); -} -#endif - static inline size_t q_avail(struct queue *q) { size_t n = 0; if (q->tail != q->head) q_copyout(q, (uint8_t *) &n, sizeof(n), q->tail); @@ -6994,58 +6980,6 @@ static uint16_t ipcsum(const void *buf, size_t len) { return csumfin(sum); } -// ARP cache is organised as a doubly linked list. A successful cache lookup -// moves an entry to the head of the list. New entries are added by replacing -// the last entry in the list with a new IP/MAC. -// ARP cache format: | prev | next | Entry0 | Entry1 | .... | EntryN | -// ARP entry format: | prev | next | IP (4bytes) | MAC (6bytes) | -// prev and next are 1-byte offsets in the cache, so cache size is max 256 bytes -// ARP entry size is 12 bytes -static void arp_cache_init(uint8_t *p, int n, int size) { - for (int i = 0; i < n; i++) p[2 + i * size] = (uint8_t) (2 + (i - 1) * size); - for (int i = 0; i < n; i++) p[3 + i * size] = (uint8_t) (2 + (i + 1) * size); - p[0] = p[2] = (uint8_t) (2 + (n - 1) * size); - p[1] = p[3 + (n - 1) * size] = 2; -} - -#if 0 -static inline void arp_cache_dump(const uint8_t *p) { - MG_INFO(("ARP cache:")); - for (uint8_t i = 0, j = p[1]; i < MIP_ARP_ENTRIES; i++, j = p[j + 1]) { - MG_INFO((" %M -> %M", mg_print_ip4, &p[j + 2], mg_print_mac, &p[j + 6])); - } -} -#endif - -static const uint8_t bcastmac[6] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; - -static uint8_t *arp_cache_find(struct mip_if *ifp, uint32_t ip) { - uint8_t *p = ifp->arp_cache; - if (ip == 0) return NULL; - // use broadcast MAC for local and global broadcast IP - if (ip == 0xffffffffU || ip == (ifp->ip | ~ifp->mask)) - return (uint8_t *) bcastmac; - for (uint8_t i = 0, j = p[1]; i < MIP_ARP_ENTRIES; i++, j = p[j + 1]) { - if (memcmp(p + j + 2, &ip, sizeof(ip)) == 0) { - p[1] = j, p[0] = p[j]; // Found entry! Point list head to us - // MG_DEBUG(("ARP find: %M @ %M", mg_print_ip4, &ip, mg_print_mac, &p[j + - // 6])); - return p + j + 6; // And return MAC address - } - } - return NULL; -} - -static void arp_cache_add(struct mip_if *ifp, uint32_t ip, uint8_t mac[6]) { - uint8_t *p = ifp->arp_cache; - if (ip == 0 || ip == ~0U) return; // Bad IP - if (arp_cache_find(ifp, ip) != NULL) return; // Already exists, do nothing - memcpy(p + p[0] + 2, &ip, sizeof(ip)); // Replace last entry: IP address - memcpy(p + p[0] + 6, mac, 6); // And MAC address - p[1] = p[0], p[0] = p[p[1]]; // Point list head to us - MG_DEBUG(("ARP cache: added %M @ %M", mg_print_ip4, &ip, mg_print_mac, mac)); -} - static size_t ether_output(struct mip_if *ifp, size_t len) { // size_t min = 64; // Pad short frames to 64 bytes (minimum Ethernet size) // if (len < min) memset(ifp->tx.ptr + len, 0, min - len), len = min; @@ -7077,7 +7011,6 @@ static void onstatechange(struct mip_if *ifp) { MG_INFO( (" Lease: %lld sec", (ifp->lease_expire - ifp->now) / 1000)); } - arp_ask(ifp, ifp->gw); } else if (ifp->state == MIP_STATE_UP) { MG_ERROR(("Link up")); } else if (ifp->state == MIP_STATE_DOWN) { @@ -7085,18 +7018,12 @@ static void onstatechange(struct mip_if *ifp) { } } -static struct ip *tx_ip(struct mip_if *ifp, uint8_t proto, uint32_t ip_src, - uint32_t ip_dst, size_t plen) { +static struct ip *tx_ip(struct mip_if *ifp, uint8_t *mac_dst, uint8_t proto, + uint32_t ip_src, uint32_t ip_dst, size_t plen) { struct eth *eth = (struct eth *) ifp->tx.ptr; struct ip *ip = (struct ip *) (eth + 1); - uint8_t *mac = arp_cache_find(ifp, ip_dst); // Dst IP in ARP cache ? - if (!mac && ((ip_dst & ifp->mask) == (ifp->ip & ifp->mask))) - arp_ask(ifp, ip_dst); // Same net, lookup - if (!mac) mac = arp_cache_find(ifp, ifp->gw); // Use gateway MAC - if (!mac) arp_ask(ifp, ifp->gw); // Not found? lookup - if (mac) memcpy(eth->dst, mac, sizeof(eth->dst)); // Found? Use it - if (!mac) memset(eth->dst, 255, sizeof(eth->dst)); // No? Use broadcast - memcpy(eth->src, ifp->mac, sizeof(eth->src)); // TODO(cpq): ARP lookup + memcpy(eth->dst, mac_dst, sizeof(eth->dst)); + memcpy(eth->src, ifp->mac, sizeof(eth->src)); // Use our MAC eth->type = mg_htons(0x800); memset(ip, 0, sizeof(*ip)); ip->ver = 0x45; // Version 4, header length 5 words @@ -7110,10 +7037,11 @@ static struct ip *tx_ip(struct mip_if *ifp, uint8_t proto, uint32_t ip_src, return ip; } -static void tx_udp(struct mip_if *ifp, uint32_t ip_src, uint16_t sport, - uint32_t ip_dst, uint16_t dport, const void *buf, - size_t len) { - struct ip *ip = tx_ip(ifp, 17, ip_src, ip_dst, len + sizeof(struct udp)); +static void tx_udp(struct mip_if *ifp, uint8_t *mac_dst, uint32_t ip_src, + uint16_t sport, uint32_t ip_dst, uint16_t dport, + const void *buf, size_t len) { + struct ip *ip = + tx_ip(ifp, mac_dst, 17, ip_src, ip_dst, len + sizeof(struct udp)); struct udp *udp = (struct udp *) (ip + 1); // MG_DEBUG(("UDP XX LEN %d %d", (int) len, (int) ifp->tx.len)); udp->sport = sport; @@ -7131,17 +7059,19 @@ static void tx_udp(struct mip_if *ifp, uint32_t ip_src, uint16_t sport, ether_output(ifp, sizeof(struct eth) + sizeof(*ip) + sizeof(*udp) + len); } -static void tx_dhcp(struct mip_if *ifp, uint32_t src, uint32_t dst, - uint8_t *opts, size_t optslen) { +static void tx_dhcp(struct mip_if *ifp, uint8_t *mac_dst, uint32_t ip_src, + uint32_t ip_dst, uint8_t *opts, size_t optslen) { struct dhcp dhcp = {1, 1, 6, 0, 0, 0, 0, 0, 0, 0, 0, {0}, 0, {0}}; dhcp.magic = mg_htonl(0x63825363); memcpy(&dhcp.hwaddr, ifp->mac, sizeof(ifp->mac)); memcpy(&dhcp.xid, ifp->mac + 2, sizeof(dhcp.xid)); memcpy(&dhcp.options, opts, optslen); - tx_udp(ifp, src, mg_htons(68), dst, mg_htons(67), &dhcp, sizeof(dhcp)); + tx_udp(ifp, mac_dst, ip_src, mg_htons(68), ip_dst, mg_htons(67), &dhcp, + sizeof(dhcp)); } -static void tx_dhcp_request(struct mip_if *ifp, uint32_t src, uint32_t dst) { +static void tx_dhcp_request(struct mip_if *ifp, uint8_t *mac_dst, + uint32_t ip_src, uint32_t ip_dst) { uint8_t opts[] = { 53, 1, 3, // Type: DHCP request 55, 2, 1, 3, // GW and mask @@ -7150,21 +7080,34 @@ static void tx_dhcp_request(struct mip_if *ifp, uint32_t src, uint32_t dst) { 50, 4, 0, 0, 0, 0, // Requested IP 255 // End of options }; - memcpy(opts + 14, &dst, sizeof(dst)); - memcpy(opts + 20, &src, sizeof(src)); - tx_dhcp(ifp, src, dst, opts, sizeof(opts)); + memcpy(opts + 14, &ip_dst, sizeof(ip_dst)); + memcpy(opts + 20, &ip_src, sizeof(ip_src)); + tx_dhcp(ifp, mac_dst, ip_src, ip_dst, opts, sizeof(opts)); } static void tx_dhcp_discover(struct mip_if *ifp) { + uint8_t mac[6] = {255, 255, 255, 255, 255, 255}; uint8_t opts[] = { 53, 1, 1, // Type: DHCP discover 55, 2, 1, 3, // Parameters: ip, mask 255 // End of options }; - tx_dhcp(ifp, 0, 0xffffffff, opts, sizeof(opts)); + tx_dhcp(ifp, mac, 0, 0xffffffff, opts, sizeof(opts)); MG_DEBUG(("DHCP discover sent")); } +static struct mg_connection *getpeer(struct mg_mgr *mgr, struct pkt *pkt, + bool lsn) { + struct mg_connection *c = NULL; + for (c = mgr->conns; c != NULL; c = c->next) { + if (c->is_udp && pkt->udp && c->loc.port == pkt->udp->dport) break; + if (!c->is_udp && pkt->tcp && c->loc.port == pkt->tcp->dport && + lsn == c->is_listening && (lsn || c->rem.port == pkt->tcp->sport)) + break; + } + return c; +} + static void rx_arp(struct mip_if *ifp, struct pkt *pkt) { if (pkt->arp->op == mg_htons(1) && pkt->arp->tpa == ifp->ip) { // ARP request. Make a response, then send @@ -7185,8 +7128,18 @@ static void rx_arp(struct mip_if *ifp, struct pkt *pkt) { ether_output(ifp, PDIFF(eth, arp + 1)); } else if (pkt->arp->op == mg_htons(2)) { if (memcmp(pkt->arp->tha, ifp->mac, sizeof(pkt->arp->tha)) != 0) return; - // MG_INFO(("ARP RESPONSE")); - arp_cache_add(ifp, pkt->arp->spa, pkt->arp->sha); + if (pkt->arp->spa == ifp->gw) { + memcpy(ifp->gwmac, pkt->arp->sha, sizeof(ifp->gwmac)); + } else { + struct mg_connection *c = getpeer(ifp->mgr, pkt, false); + if (c != NULL && c->is_arplooking) { + struct connstate *s = (struct connstate *) (c + 1); + memcpy(s->mac, pkt->arp->sha, sizeof(s->mac)); + MG_DEBUG(("%lu ARP resolved %M -> %M", c->id, mg_print_ip4, &c->rem.ip, + mg_print_mac, s->mac)); + c->is_arplooking = 0; + } + } } } @@ -7196,8 +7149,8 @@ static void rx_icmp(struct mip_if *ifp, struct pkt *pkt) { size_t hlen = sizeof(struct eth) + sizeof(struct ip) + sizeof(struct icmp); size_t space = ifp->tx.len - hlen, plen = pkt->pay.len; if (plen > space) plen = space; - struct ip *ip = - tx_ip(ifp, 1, ifp->ip, pkt->ip->src, sizeof(struct icmp) + plen); + struct ip *ip = tx_ip(ifp, pkt->eth->src, 1, ifp->ip, pkt->ip->src, + sizeof(struct icmp) + plen); struct icmp *icmp = (struct icmp *) (ip + 1); memset(icmp, 0, sizeof(*icmp)); // Set csum to 0 memcpy(icmp + 1, pkt->pay.ptr, plen); // Copy RX payload to TX @@ -7225,11 +7178,11 @@ static void rx_dhcp_client(struct mip_if *ifp, struct pkt *pkt) { p += p[1] + 2; } if (ip && mask && gw && ifp->ip == 0) { - arp_cache_add(ifp, pkt->dhcp->siaddr, ((struct eth *) pkt->raw.ptr)->src); + memcpy(ifp->gwmac, pkt->eth->src, sizeof(ifp->gwmac)); ifp->ip = ip, ifp->gw = gw, ifp->mask = mask; ifp->state = MIP_STATE_READY; onstatechange(ifp); - tx_dhcp_request(ifp, ip, pkt->dhcp->siaddr); + tx_dhcp_request(ifp, pkt->eth->src, ip, pkt->dhcp->siaddr); } } @@ -7264,24 +7217,12 @@ static void rx_dhcp_server(struct mip_if *ifp, struct pkt *pkt) { memcpy(&res.options, opts, sizeof(opts)); res.magic = pkt->dhcp->magic; res.xid = pkt->dhcp->xid; - arp_cache_add(ifp, res.yiaddr, pkt->eth->src); - tx_udp(ifp, ifp->ip, mg_htons(67), op == 1 ? ~0U : res.yiaddr, mg_htons(68), - &res, sizeof(res)); + // memcpy(ifp->gwmac, pkt->eth->src, sizeof(ifp->gwmac)); + tx_udp(ifp, pkt->eth->src, ifp->ip, mg_htons(67), + op == 1 ? ~0U : res.yiaddr, mg_htons(68), &res, sizeof(res)); } } -static struct mg_connection *getpeer(struct mg_mgr *mgr, struct pkt *pkt, - bool lsn) { - struct mg_connection *c = NULL; - for (c = mgr->conns; c != NULL; c = c->next) { - if (c->is_udp && pkt->udp && c->loc.port == pkt->udp->dport) break; - if (!c->is_udp && pkt->tcp && c->loc.port == pkt->tcp->dport && - lsn == c->is_listening && (lsn || c->rem.port == pkt->tcp->sport)) - break; - } - return c; -} - static void rx_udp(struct mip_if *ifp, struct pkt *pkt) { struct mg_connection *c = getpeer(ifp->mgr, pkt, true); if (c == NULL) { @@ -7302,10 +7243,11 @@ static void rx_udp(struct mip_if *ifp, struct pkt *pkt) { } } -static size_t tx_tcp(struct mip_if *ifp, uint32_t dst_ip, uint8_t flags, - uint16_t sport, uint16_t dport, uint32_t seq, uint32_t ack, - const void *buf, size_t len) { - struct ip *ip = tx_ip(ifp, 6, ifp->ip, dst_ip, sizeof(struct tcp) + len); +static size_t tx_tcp(struct mip_if *ifp, uint8_t *dst_mac, uint32_t dst_ip, + uint8_t flags, uint16_t sport, uint16_t dport, + uint32_t seq, uint32_t ack, const void *buf, size_t len) { + struct ip *ip = + tx_ip(ifp, dst_mac, 6, ifp->ip, dst_ip, sizeof(struct tcp) + len); struct tcp *tcp = (struct tcp *) (ip + 1); memset(tcp, 0, sizeof(*tcp)); if (buf != NULL && len) memmove(tcp + 1, buf, len); @@ -7330,8 +7272,9 @@ static size_t tx_tcp(struct mip_if *ifp, uint32_t dst_ip, uint8_t flags, static size_t tx_tcp_pkt(struct mip_if *ifp, struct pkt *pkt, uint8_t flags, uint32_t seq, const void *buf, size_t len) { uint32_t delta = (pkt->tcp->flags & (TH_SYN | TH_FIN)) ? 1 : 0; - return tx_tcp(ifp, pkt->ip->src, flags, pkt->tcp->dport, pkt->tcp->sport, seq, - mg_htonl(mg_ntohl(pkt->tcp->seq) + delta), buf, len); + return tx_tcp(ifp, pkt->eth->src, pkt->ip->src, flags, pkt->tcp->dport, + pkt->tcp->sport, seq, mg_htonl(mg_ntohl(pkt->tcp->seq) + delta), + buf, len); } static void settmout(struct mg_connection *c, uint8_t type) { @@ -7348,6 +7291,7 @@ static struct mg_connection *accept_conn(struct mg_connection *lsn, struct mg_connection *c = mg_alloc_conn(lsn->mgr); struct connstate *s = (struct connstate *) (c + 1); s->seq = mg_ntohl(pkt->tcp->ack), s->ack = mg_ntohl(pkt->tcp->seq); + memcpy(s->mac, pkt->eth->src, sizeof(s->mac)); settmout(c, MIP_TTYPE_KEEPALIVE); c->rem.ip = pkt->ip->src; c->rem.port = pkt->tcp->sport; @@ -7370,7 +7314,7 @@ long mg_io_send(struct mg_connection *c, const void *buf, size_t len) { struct connstate *s = (struct connstate *) (c + 1); size_t max_headers_len = 14 + 24 /* max IP */ + 60 /* max TCP */; if (len + max_headers_len > ifp->tx.len) len = ifp->tx.len - max_headers_len; - if (tx_tcp(ifp, c->rem.ip, TH_PUSH | TH_ACK, c->loc.port, c->rem.port, + if (tx_tcp(ifp, s->mac, c->rem.ip, TH_PUSH | TH_ACK, c->loc.port, c->rem.port, mg_htonl(s->seq), mg_htonl(s->ack), buf, len) > 0) { s->seq += (uint32_t) len; if (s->ttype == MIP_TTYPE_ACK) settmout(c, MIP_TTYPE_KEEPALIVE); @@ -7615,20 +7559,14 @@ static void mip_poll(struct mip_if *ifp, uint64_t uptime_ms) { } } if (ifp->state == MIP_STATE_DOWN) return; - // if (expired_1000ms) arp_cache_dump(ifp->arp_cache); - if (ifp->ip == 0 && expired_1000ms) { - tx_dhcp_discover(ifp); // If IP not configured, send DHCP - } else if (ifp->enable_dhcp_client == false && expired_1000ms && ifp->gw && - arp_cache_find(ifp, ifp->gw) == NULL) { - arp_ask(ifp, ifp->gw); // If GW's MAC address in not in ARP cache - } + // If IP not configured, send DHCP + if (ifp->ip == 0 && expired_1000ms) tx_dhcp_discover(ifp); // Read data from the network size_t len = ifp->driver->rx((void *) ifp->rx.ptr, ifp->rx.len, ifp); if (len) { mip_rx(ifp, (void *) ifp->rx.ptr, len); - qp_mark(QP_FRAMEDONE, (int) q_space(&ifp->queue)); } // Process timeouts @@ -7639,23 +7577,20 @@ static void mip_poll(struct mip_if *ifp, uint64_t uptime_ms) { if (uptime_ms > s->timer) { if (s->ttype == MIP_TTYPE_ACK) { MG_DEBUG(("%lu ack %x %x", c->id, s->seq, s->ack)); - tx_tcp(ifp, c->rem.ip, TH_ACK, c->loc.port, c->rem.port, + tx_tcp(ifp, s->mac, c->rem.ip, TH_ACK, c->loc.port, c->rem.port, mg_htonl(s->seq), mg_htonl(s->ack), "", 0); } else { if (s->tmiss++ > 2) { mg_error(c, "keepalive"); } else { MG_DEBUG(("%lu keepalive", c->id)); - tx_tcp(ifp, c->rem.ip, TH_ACK, c->loc.port, c->rem.port, + tx_tcp(ifp, s->mac, c->rem.ip, TH_ACK, c->loc.port, c->rem.port, mg_htonl(s->seq - 1), mg_htonl(s->ack), "", 0); } } settmout(c, MIP_TTYPE_KEEPALIVE); } } -#ifdef MIP_QPROFILE - qp_log(); -#endif } // This function executes in interrupt context, thus it should copy data @@ -7663,21 +7598,14 @@ static void mip_poll(struct mip_if *ifp, uint64_t uptime_ms) { // our lock-free queue with preallocated buffer to copy data and return asap void mip_qwrite(void *buf, size_t len, struct mip_if *ifp) { if (q_write(&ifp->queue, buf, len)) { - qp_mark(QP_FRAMEPUSHED, (int) q_space(&ifp->queue)); ifp->nrecv++; } else { - ifp->ndropped++; - qp_mark(QP_FRAMEDROPPED, ifp->dropped); - MG_ERROR(("dropped %d", (int) len)); + ifp->ndrop++; } } size_t mip_qread(void *buf, struct mip_if *ifp) { - size_t len = q_read(&ifp->queue, buf); - if (len) { - qp_mark(QP_FRAMEPOPPED, (int) q_space(&ifp->queue)); - } - return len; + return q_read(&ifp->queue, buf); } size_t mip_driver_rx(void *buf, size_t len, struct mip_if *ifp) { @@ -7690,7 +7618,7 @@ void mip_init(struct mg_mgr *mgr, struct mip_if *ifp) { if (ifp->mac[0] == 0 && ifp->mac[1] == 0 && ifp->mac[2] == 0 && ifp->mac[3] == 0 && ifp->mac[4] == 0 && ifp->mac[5] == 0) { mg_random(ifp->mac, sizeof(ifp->mac)); - ifp->mac[0] &= (uint8_t) ~1; // 1st byte must be even (unicast) + ifp->mac[0] &= (uint8_t) ~1; // Clear bit 0. 1st byte is even (unicast) MG_INFO(("MAC not set. Generated random: %M", mg_print_mac, ifp->mac)); } @@ -7702,20 +7630,17 @@ void mip_init(struct mg_mgr *mgr, struct mip_if *ifp) { ifp->tx.ptr = (char *) calloc(1, maxpktsize), ifp->tx.len = maxpktsize; if (ifp->queue.len) ifp->queue.buf = (uint8_t *) calloc(1, ifp->queue.len); ifp->timer_1000ms = mg_millis(); - arp_cache_init(ifp->arp_cache, MIP_ARP_ENTRIES, 12); mgr->priv = ifp; ifp->mgr = mgr; mgr->extraconnsize = sizeof(struct connstate); if (ifp->ip == 0) ifp->enable_dhcp_client = true; + memset(ifp->gwmac, 255, sizeof(ifp->gwmac)); // Set to broadcast // Randomise initial ephemeral port uint16_t jitter; mg_random(&jitter, sizeof(jitter)); - ifp->eport = MIP_ETHEMERAL_PORT + (jitter % (0xffffu - MIP_ETHEMERAL_PORT)); - -#ifdef MIP_QPROFILE - qp_init(); -#endif + ifp->eport = MIP_EPHEMERAL_PORT + + (uint16_t) (jitter % (0xffffu - MIP_EPHEMERAL_PORT)); } } @@ -7730,21 +7655,37 @@ int mg_mkpipe(struct mg_mgr *m, mg_event_handler_t fn, void *d, bool udp) { return -1; } +static void send_syn(struct mg_connection *c) { + struct connstate *s = (struct connstate *) (c + 1); + uint32_t isn = mg_htonl((uint32_t) mg_ntohs(c->loc.port)); + struct mip_if *ifp = (struct mip_if *) c->mgr->priv; + tx_tcp(ifp, s->mac, c->rem.ip, TH_SYN, c->loc.port, c->rem.port, isn, 0, NULL, + 0); +} + void mg_connect_resolved(struct mg_connection *c) { struct mip_if *ifp = (struct mip_if *) c->mgr->priv; c->is_resolving = 0; - if (ifp->eport < MIP_ETHEMERAL_PORT) ifp->eport = MIP_ETHEMERAL_PORT; + if (ifp->eport < MIP_EPHEMERAL_PORT) ifp->eport = MIP_EPHEMERAL_PORT; c->loc.ip = ifp->ip; c->loc.port = mg_htons(ifp->eport++); MG_DEBUG(("%lu %M -> %M", c->id, mg_print_ip_port, &c->loc, mg_print_ip_port, &c->rem)); mg_call(c, MG_EV_RESOLVE, NULL); - if (c->is_udp) { - mg_call(c, MG_EV_CONNECT, NULL); + if (((c->rem.ip & ifp->mask) == (ifp->ip & ifp->mask))) { + // If we're in the same LAN, fire an ARP lookup. TODO(cpq): handle this! + MG_DEBUG(("%lu ARP lookup...", c->id)); + arp_ask(ifp, c->rem.ip); + c->is_arplooking = 1; } else { - uint32_t isn = mg_htonl((uint32_t) mg_ntohs(c->loc.port)); - tx_tcp(ifp, c->rem.ip, TH_SYN, c->loc.port, c->rem.port, isn, 0, NULL, 0); - c->is_connecting = 1; + struct connstate *s = (struct connstate *) (c + 1); + memcpy(s->mac, ifp->gwmac, sizeof(ifp->gwmac)); + if (c->is_udp) { + mg_call(c, MG_EV_CONNECT, NULL); + } else { + send_syn(c); + c->is_connecting = 1; + } } } @@ -7767,7 +7708,7 @@ static void close_conn(struct mg_connection *c) { mg_iobuf_free(&s->raw); // For TLS connections, release raw data if (c->is_udp == false && c->is_listening == false) { // For TCP conns, struct mip_if *ifp = (struct mip_if *) c->mgr->priv; // send TCP FIN - tx_tcp(ifp, c->rem.ip, TH_FIN | TH_ACK, c->loc.port, c->rem.port, + tx_tcp(ifp, s->mac, c->rem.ip, TH_FIN | TH_ACK, c->loc.port, c->rem.port, mg_htonl(s->seq), mg_htonl(s->ack), NULL, 0); } mg_close_conn(c); @@ -7775,7 +7716,7 @@ static void close_conn(struct mg_connection *c) { static bool can_write(struct mg_connection *c) { return c->is_connecting == 0 && c->is_resolving == 0 && c->send.len > 0 && - c->is_tls_hs == 0; + c->is_tls_hs == 0 && c->is_arplooking == 0; } void mg_mgr_poll(struct mg_mgr *mgr, int ms) { @@ -7803,54 +7744,12 @@ bool mg_send(struct mg_connection *c, const void *buf, size_t len) { if (ifp->ip == 0 || ifp->state != MIP_STATE_READY) { mg_error(c, "net down"); } else if (c->is_udp) { - tx_udp(ifp, ifp->ip, c->loc.port, c->rem.ip, c->rem.port, buf, len); + struct connstate *s = (struct connstate *) (c + 1); + tx_udp(ifp, s->mac, ifp->ip, c->loc.port, c->rem.ip, c->rem.port, buf, len); res = true; } else { res = mg_iobuf_add(&c->send, c->send.len, buf, len); } return res; } - -#ifdef MIP_QPROFILE - -#pragma pack(push, 1) -struct qpentry { - uint32_t timestamp; - uint16_t type; - uint16_t len; -}; -#pragma pack(pop) - -static struct queue qp; - -// This is called from IRQ and main contexts; two producers, single consumer -// TODO(scaprile): avoid concurrency issues (2 queues ?) -void qp_mark(unsigned int type, int len) { - static bool ovf = false; - static uint16_t irq_ctr = 0, drop_ctr = 0; - struct qpentry e = {.timestamp = (uint32_t) mg_millis(), - .type = (uint16_t) type, - .len = (uint16_t) len}; - if (type == QP_IRQTRIGGERED) e.len = ++irq_ctr; - if (ovf) { - e.type = (uint16_t) QP_QUEUEOVF; - e.len = drop_ctr; - } - ovf = !q_write(&qp, &e, sizeof(e)); -} - -void qp_log(void) { - struct qpentry e; - const char *titles[] = {"IRQ ", "PUSH", "POP ", "DONE", "DROP", "OVFL"}; - for (int i = 0; i < 10 && q_read(&qp, &e); i++) { - MG_INFO(("%lx %s %u", e.timestamp, titles[e.type], e.len)); - } -} - -void qp_init(void) { - qp.len = 500 * (sizeof(size_t) + sizeof(struct qpentry)); - qp.buf = calloc(1, qp.len); // THERE IS NO FREE -} -#endif // MIP_QPROFILE - #endif // MG_ENABLE_MIP diff --git a/mongoose.h b/mongoose.h index 748ca07c..f22f8337 100644 --- a/mongoose.h +++ b/mongoose.h @@ -1090,6 +1090,7 @@ struct mg_connection { unsigned is_client : 1; // Outbound (client) connection unsigned is_accepted : 1; // Accepted (server) connection unsigned is_resolving : 1; // Non-blocking DNS resolution is in progress + unsigned is_arplooking : 1; // Non-blocking ARP resolution is in progress unsigned is_connecting : 1; // Non-blocking connect is in progress unsigned is_tls : 1; // TLS-enabled connection unsigned is_tls_hs : 1; // TLS handshake is in progress @@ -1470,9 +1471,6 @@ struct queue { volatile size_t tail, head; }; -#define MIP_ARP_ENTRIES 5 // Number of ARP cache entries. Maximum 21 -#define MIP_ARP_CS (2 + 12 * MIP_ARP_ENTRIES) // ARP cache size - // Network interface struct mip_if { uint8_t mac[6]; // MAC address. Must be set to a valid MAC @@ -1487,19 +1485,19 @@ struct mip_if { struct queue queue; // Set queue.len for interrupt based drivers // Internal state, user can use it but should not change it - uint64_t now; // Current time - uint64_t timer_1000ms; // 1000 ms timer: for DHCP and link state - uint64_t lease_expire; // Lease expiration time - uint8_t arp_cache[MIP_ARP_CS]; // Each entry is 12 bytes - uint16_t eport; // Next ephemeral port - volatile uint32_t ndropped; // Number of received, but dropped frames - volatile uint32_t nrecv; // Number of received frames - volatile uint32_t nsent; // Number of transmitted frames - volatile uint32_t nerr; // Number of driver errors - uint8_t state; // Current state -#define MIP_STATE_DOWN 0 // Interface is down -#define MIP_STATE_UP 1 // Interface is up -#define MIP_STATE_READY 2 // Interface is up and has IP + uint8_t gwmac[6]; // Router's MAC + uint64_t now; // Current time + uint64_t timer_1000ms; // 1000 ms timer: for DHCP and link state + uint64_t lease_expire; // Lease expiration time + uint16_t eport; // Next ephemeral port + volatile uint32_t ndrop; // Number of received, but dropped frames + volatile uint32_t nrecv; // Number of received frames + volatile uint32_t nsent; // Number of transmitted frames + volatile uint32_t nerr; // Number of driver errors + uint8_t state; // Current state +#define MIP_STATE_DOWN 0 // Interface is down +#define MIP_STATE_UP 1 // Interface is up +#define MIP_STATE_READY 2 // Interface is up and has IP }; void mip_init(struct mg_mgr *, struct mip_if *); @@ -1530,23 +1528,6 @@ struct mip_spi { #endif #endif -#ifdef MIP_QPROFILE -enum { - QP_IRQTRIGGERED = 0, // payload is number of interrupts so far - QP_FRAMEPUSHED, // available space in the frame queue - QP_FRAMEPOPPED, // available space in the frame queue - QP_FRAMEDONE, // available space in the frame queue - QP_FRAMEDROPPED, // number of dropped frames - QP_QUEUEOVF // profiling queue is full, payload is number of frame drops -}; - -void qp_mark(unsigned int type, int len); -void qp_log(void); // timestamp, type, payload -void qp_init(void); -#else -#define qp_mark(a, b) -#endif - struct mip_driver_stm32_data { // MDC clock divider. MDC clock is derived from HCLK, must not exceed 2.5MHz diff --git a/src/net.h b/src/net.h index 53ff4cbe..d7a82c49 100644 --- a/src/net.h +++ b/src/net.h @@ -58,6 +58,7 @@ struct mg_connection { unsigned is_client : 1; // Outbound (client) connection unsigned is_accepted : 1; // Accepted (server) connection unsigned is_resolving : 1; // Non-blocking DNS resolution is in progress + unsigned is_arplooking : 1; // Non-blocking ARP resolution is in progress unsigned is_connecting : 1; // Non-blocking connect is in progress unsigned is_tls : 1; // TLS-enabled connection unsigned is_tls_hs : 1; // TLS handshake is in progress