Merge pull request #2642 from cesanta/autoinit

Add driver init to mg_mgr_init()

Makefile

@@ -139,11 +139,11 @@ s390: CC = $(DOCKER) mdashnet/s390 cc
 s390: RUN = $(DOCKER) mdashnet/s390
 s390: test
 
-arm: DEFS += -DMG_ENABLE_POSIX_FS=0 -DMG_ENABLE_TCPIP=1 -DMG_ARCH=MG_ARCH_NEWLIB 
+arm: DEFS += -DMG_ENABLE_POSIX_FS=0 -DMG_ENABLE_TCPIP=1 -DMG_ENABLE_TCPIP_DRIVER_INIT=0 -DMG_ARCH=MG_ARCH_NEWLIB 
 arm: mongoose.h $(SRCS)
 	$(DOCKER) mdashnet/armgcc arm-none-eabi-gcc -mcpu=cortex-m3 -mthumb $(SRCS) $(OPTS) $(WARN) $(INCS) $(DEFS) $(TFLAGS) -o unit_test -nostartfiles --specs nosys.specs -e 0
 
-riscv: DEFS += -DMG_ENABLE_POSIX_FS=0 -DMG_ENABLE_TCPIP=1 -DMG_ARCH=MG_ARCH_NEWLIB 
+riscv: DEFS += -DMG_ENABLE_POSIX_FS=0 -DMG_ENABLE_TCPIP=1 -DMG_ENABLE_TCPIP_DRIVER_INIT=0 -DMG_ARCH=MG_ARCH_NEWLIB 
 riscv: mongoose.h $(SRCS)
 	$(DOCKER) mdashnet/riscv riscv-none-elf-gcc -march=rv32imc -mabi=ilp32 $(SRCS) $(OPTS) $(WARN) $(INCS) $(DEFS) $(TFLAGS) -o unit_test
 

examples/arduino/w5500-http/mongoose_custom.h

@@ -10,6 +10,7 @@
 #define MG_ARCH MG_ARCH_CUSTOM
 #define MG_ENABLE_SOCKET 0
 #define MG_ENABLE_TCPIP 1
+#define MG_ENABLE_DRIVER_W5500 1
 #define mkdir(a, b) (-1)
 #define MG_IO_SIZE 128
 //#define MG_ENABLE_LOG 0

examples/arduino/w5500-mqtt/mongoose_custom.h

@@ -10,6 +10,7 @@
 #define MG_ARCH MG_ARCH_CUSTOM
 #define MG_ENABLE_SOCKET 0
 #define MG_ENABLE_TCPIP 1
+#define MG_ENABLE_DRIVER_W5500 1
 #define mkdir(a, b) (-1)
 #define MG_IO_SIZE 512
 //#define MG_ENABLE_LOG 0

examples/mip-pcap/Makefile

@@ -6,7 +6,7 @@ CFLAGS = -W -Wall -Wextra -g -I.  # Build options
 CFLAGS += -lpcap                  # link with libpcap
 
 # Mongoose build options. See https://mongoose.ws/documentation/#build-options
-CFLAGS_MONGOOSE += -DMG_ENABLE_LINES=1 -DMG_ENABLE_TCPIP=1 -DMG_ENABLE_SOCKET=0
+CFLAGS_MONGOOSE += -DMG_ENABLE_LINES=1 -DMG_ENABLE_TCPIP=1 -DMG_ENABLE_SOCKET=0 -DMG_ENABLE_TCPIP_DRIVER_INIT=0
 
 ifeq ($(OS),Windows_NT)   # Windows settings. Assume MinGW compiler. To use VC: make CC=cl CFLAGS=/MD OUT=/Feprog.exe
   PROG ?= example.exe           # Use .exe suffix for the binary

examples/mip-tap/Makefile

@@ -5,7 +5,7 @@ SOURCES = main.c mongoose.c net.c packed_fs.c      # Source code files
 CFLAGS = -W -Wall -Wextra -g -I.  # Build options
 
 # Mongoose build options. See https://mongoose.ws/documentation/#build-options
-CFLAGS_MONGOOSE += -DMG_ENABLE_LINES=1 -DMG_ENABLE_TCPIP=1 -DMG_ENABLE_SOCKET=0 -DMG_ENABLE_PACKED_FS=1
+CFLAGS_MONGOOSE += -DMG_ENABLE_LINES=1 -DMG_ENABLE_TCPIP=1 -DMG_ENABLE_SOCKET=0 -DMG_ENABLE_PACKED_FS=1 -DMG_ENABLE_TCPIP_DRIVER_INIT=0
 
 # Example specific build options. See README.md
 CFLAGS += -DHTTP_URL=\"http://0.0.0.0/\" -DHTTPS_URL=\"https://0.0.0.0/\"

examples/rp2040/pico-rmii/CMakeLists.txt

@@ -20,4 +20,5 @@ pico_enable_stdio_uart(firmware 0)   # to USB
 
 # Mongoose build flags
 add_definitions(-DMG_ENABLE_TCPIP=1)
+add_definitions(-DMG_ENABLE_TCPIP_DRIVER_INIT=0)
 add_definitions(-DMG_ENABLE_PACKED_FS=1)

examples/rp2040/pico-rndis-dashboard/CMakeLists.txt

@@ -26,6 +26,7 @@ pico_enable_stdio_uart(firmware 1)   # to the UART
 # Mongoose build flags
 add_definitions(-DMG_ENABLE_TCPIP=1)
 add_definitions(-DMG_ENABLE_PACKED_FS=1)
+add_definitions(-DMG_ENABLE_TCPIP_DRIVER_INIT=0)
 add_definitions(-DMG_ENABLE_POSIX_FS=0)
 add_definitions(-DDISABLE_ROUTING=1)
 

examples/rp2040/pico-rndis-device/CMakeLists.txt

@@ -23,6 +23,7 @@ pico_enable_stdio_uart(firmware 1)   # to the UART
 
 # Mongoose build flags
 add_definitions(-DMG_ENABLE_TCPIP=1)
+add_definitions(-DMG_ENABLE_TCPIP_DRIVER_INIT=0)
 add_definitions(-DMG_ENABLE_POSIX_FS=0)
 
 # Example build options

examples/rp2040/pico-w5500/CMakeLists.txt

@@ -14,6 +14,7 @@ pico_enable_stdio_uart(firmware 1)   # to the UART, for remote testing
 
 # Mongoose build flags
 add_definitions(-DMG_ENABLE_TCPIP=1)
+add_definitions(-DMG_ENABLE_DRIVER_W5500=1)
 add_definitions(-DMG_ENABLE_PACKED_FS=1)
 add_definitions(-DMG_ENABLE_CUSTOM_RANDOM=1)
 add_definitions(-DMG_ENABLE_POSIX_FS=0)

examples/stm32/nucleo-g031-make-baremetal-builtin/mongoose_custom.h

@@ -4,6 +4,7 @@
 #define MG_ARCH MG_ARCH_NEWLIB
 
 #define MG_ENABLE_TCPIP 1
+#define MG_ENABLE_DRIVER_W5500 1
 #define MG_ENABLE_CUSTOM_MILLIS 1
 #define MG_ENABLE_CUSTOM_RANDOM 1
 #define MG_IO_SIZE 128

mongoose.c

@@ -4851,6 +4851,11 @@ void mg_mgr_free(struct mg_mgr *mgr) {
   mg_tls_ctx_free(mgr);
 }
 
+
+#if MG_ENABLE_TCPIP && MG_ENABLE_TCPIP_DRIVER_INIT
+void mg_tcpip_auto_init(struct mg_mgr *);
+#endif
+
 void mg_mgr_init(struct mg_mgr *mgr) {
   memset(mgr, 0, sizeof(*mgr));
 #if MG_ENABLE_EPOLL
@@ -4869,6 +4874,8 @@ void mg_mgr_init(struct mg_mgr *mgr) {
   // Ignore SIGPIPE signal, so if client cancels the request, it
   // won't kill the whole process.
   signal(SIGPIPE, SIG_IGN);
+#elif MG_ENABLE_TCPIP && MG_ENABLE_TCPIP_DRIVER_INIT
+  mg_tcpip_auto_init(mgr);
 #endif
   mgr->pipe = MG_INVALID_SOCKET;
   mgr->dnstimeout = 3000;
@@ -5747,6 +5754,14 @@ static void mg_tcpip_poll(struct mg_tcpip_if *ifp, uint64_t now) {
   bool expired_1000ms = mg_timer_expired(&ifp->timer_1000ms, 1000, now);
   ifp->now = now;
 
+#if MG_ENABLE_TCPIP_PRINT_DEBUG_STATS
+  if (expired_1000ms) {
+    const char *names[] = {"down", "up", "req", "ready"};
+    MG_INFO(("Ethernet: %s, IP: %M, rx:%u, tx:%u, dr:%u, er:%u",
+             names[ifp->state], mg_print_ip4, &ifp->ip, ifp->nrecv, ifp->nsent,
+             ifp->ndrop, ifp->nerr));
+  }
+#endif
   // Handle physical interface up/down status
   if (expired_1000ms && ifp->driver->up) {
     bool up = ifp->driver->up(ifp);
@@ -6007,6 +6022,24 @@ bool mg_send(struct mg_connection *c, const void *buf, size_t len) {
   }
   return res;
 }
+
+#if MG_ENABLE_TCPIP_DRIVER_INIT && defined(MG_TCPIP_DRIVER_DATA)
+void mg_tcpip_auto_init(struct mg_mgr *mgr);
+void mg_tcpip_auto_init(struct mg_mgr *mgr) {
+  MG_TCPIP_DRIVER_DATA  // static ... driver_data
+      struct mg_tcpip_if i = {
+          // let the compiler solve the macros at run time
+          .mac = MG_MAC_ADDRESS,          .ip = MG_TCPIP_IP,
+          .mask = MG_TCPIP_MASK,          .gw = MG_TCPIP_GW,
+          .driver = MG_TCPIP_DRIVER_CODE, .driver_data = &driver_data,
+      };
+  static struct mg_tcpip_if mif;
+
+  mif = i;  // copy the initialized structure to a static to be exported
+  mg_tcpip_init(mgr, &mif);
+  MG_INFO(("Driver: " MG_TCPIP_DRIVER_NAME ", MAC: %M", mg_print_mac, mif.mac));
+}
+#endif
 #endif  // MG_ENABLE_TCPIP
 
 #ifdef MG_ENABLE_LINES
@@ -14938,7 +14971,8 @@ struct mg_tcpip_driver mg_tcpip_driver_ra = {mg_tcpip_driver_ra_init,
 #endif
 
 
-#if defined(MG_ENABLE_DRIVER_SAME54) && MG_ENABLE_DRIVER_SAME54
+#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_SAME54) && MG_ENABLE_DRIVER_SAME54
+
 #include <sam.h>
 
 #define ETH_PKT_SIZE 1536  // Max frame size
@@ -15941,7 +15975,7 @@ struct mg_tcpip_driver mg_tcpip_driver_tm4c = {mg_tcpip_driver_tm4c_init,
 #endif
 
 
-#if MG_ENABLE_TCPIP
+#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_W5500) && MG_ENABLE_DRIVER_W5500
 
 enum { W5500_CR = 0, W5500_S0 = 1, W5500_TX0 = 2, W5500_RX0 = 3 };
 

mongoose.h

@@ -833,6 +833,28 @@ struct timeval {
 #define MG_ENABLE_PROFILE 0
 #endif
 
+#ifndef MG_ENABLE_TCPIP_DRIVER_INIT    // mg_mgr_init() will also initialize
+#define MG_ENABLE_TCPIP_DRIVER_INIT 1  // enabled built-in driver for
+#endif                                 // Mongoose built-in network stack
+
+#ifndef MG_TCPIP_IP  // e.g. MG_IPV4(192, 168, 0, 223)
+#define MG_TCPIP_IP MG_IPV4(0, 0, 0, 0)  // or leave as 0 for DHCP
+#endif
+
+#ifndef MG_TCPIP_MASK
+#define MG_TCPIP_MASK MG_IPV4(255, 255, 255, 0)
+#endif
+
+#ifndef MG_TCPIP_GW
+#define MG_TCPIP_GW MG_IPV4(0, 0, 0, 1)
+#endif
+
+#define MG_MAC_ADDRESS_RANDOM { 0, 0, 0, 0, 0, 0 }
+
+#ifndef MG_ENABLE_TCPIP_PRINT_DEBUG_STATS
+#define MG_ENABLE_TCPIP_PRINT_DEBUG_STATS 0
+#endif
+
 
 
 
@@ -1060,6 +1082,8 @@ uint64_t mg_now(void);     // Return milliseconds since Epoch
   (((uint32_t) ((a) & 255) << 24) | ((uint32_t) ((b) & 255) << 16) | \
    ((uint32_t) ((c) & 255) << 8) | (uint32_t) ((d) & 255))
 
+#define MG_IPV4(a, b, c, d) mg_htonl(MG_U32(a, b, c, d))
+
 // For printing IPv4 addresses: printf("%d.%d.%d.%d\n", MG_IPADDR_PARTS(&ip))
 #define MG_U8P(ADDR) ((uint8_t *) (ADDR))
 #define MG_IPADDR_PARTS(ADDR) \
@@ -2858,8 +2882,19 @@ struct mg_profitem {
 #include "Driver_ETH_MAC.h"  // keep this include
 #include "Driver_ETH_PHY.h"  // keep this include
 
+#ifndef MG_MAC_ADDRESS
+#define MG_MAC_ADDRESS MG_MAC_ADDRESS_RANDOM
 #endif
 
+#define MG_TCPIP_DRIVER_DATA int driver_data;
+
+#define MG_TCPIP_DRIVER_CODE &mg_tcpip_driver_cmsis
+#define MG_TCPIP_DRIVER_NAME "cmsis"
+
+#endif
+
+
+#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_IMXRT) && MG_ENABLE_DRIVER_IMXRT
 
 struct mg_tcpip_driver_imxrt_data {
   // MDC clock divider. MDC clock is derived from IPS Bus clock (ipg_clk),
@@ -2878,6 +2913,31 @@ struct mg_tcpip_driver_imxrt_data {
   uint8_t phy_addr;  // PHY address
 };
 
+#ifndef MG_MAC_ADDRESS
+#define MG_MAC_ADDRESS MG_MAC_ADDRESS_RANDOM
+#endif
+
+#ifndef MG_TCPIP_PHY_ADDR
+#define MG_TCPIP_PHY_ADDR 2
+#endif
+
+#ifndef MG_DRIVER_MDC_CR
+#define MG_DRIVER_MDC_CR 24
+#endif
+
+#define MG_TCPIP_DRIVER_DATA                                \
+  static struct mg_tcpip_driver_imxrt_data driver_data = { \
+      .mdc_cr = MG_DRIVER_MDC_CR,                            \
+      .phy_addr = MG_TCPIP_PHY_ADDR,                        \
+  };
+
+#define MG_TCPIP_DRIVER_CODE &mg_tcpip_driver_imxrt
+#define MG_TCPIP_DRIVER_NAME "imxrt"
+
+#endif
+
+
+#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_RA) && MG_ENABLE_DRIVER_RA
 
 struct mg_tcpip_driver_ra_data {
   // MDC clock "divider". MDC clock is software generated,
@@ -2886,11 +2946,65 @@ struct mg_tcpip_driver_ra_data {
   uint8_t phy_addr;  // PHY address
 };
 
+#undef MG_ENABLE_TCPIP_DRIVER_INIT
+#define MG_ENABLE_TCPIP_DRIVER_INIT 0  // TODO(): needs SystemCoreClock
+#if 0
+#ifndef MG_MAC_ADDRESS
+#define MG_MAC_ADDRESS MG_MAC_ADDRESS_RANDOM
+#endif
+
+#ifndef MG_TCPIP_PHY_ADDR
+#define MG_TCPIP_PHY_ADDR 1
+#endif
+
+#ifndef MG_DRIVER_RA_CLOCK
+#define MG_DRIVER_RA_CLOCK
+#endif
+
+#ifndef MG_DRIVER_RA_IRQNO
+#define MG_DRIVER_RA_IRQNO 0
+#endif
+
+#define MG_TCPIP_DRIVER_DATA                                \
+  static struct mg_tcpip_driver_ra_data driver_data = { \
+      .clock = MG_DRIVER_RA_CLOCK,                            \
+      .irqno = MG_DRIVER_RA_CLOCK,                            \
+      .phy_addr = MG_TCPIP_PHY_ADDR,                        \
+  };
+
+#define MG_TCPIP_DRIVER_CODE &mg_tcpip_driver_ra
+#define MG_TCPIP_DRIVER_NAME "ra"
+#endif
+#endif
+
+
+#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_SAME54) && MG_ENABLE_DRIVER_SAME54
 
 struct mg_tcpip_driver_same54_data {
     int mdc_cr;
 };
 
+#ifndef MG_MAC_ADDRESS
+#define MG_MAC_ADDRESS MG_MAC_ADDRESS_RANDOM
+#endif
+
+#ifndef MG_DRIVER_MDC_CR
+#define MG_DRIVER_MDC_CR 5
+#endif
+
+#define MG_TCPIP_DRIVER_DATA                                \
+  static struct mg_tcpip_driver_same54_data driver_data = { \
+      .mdc_cr = MG_DRIVER_MDC_CR,                            \
+  };
+
+#define MG_TCPIP_DRIVER_CODE &mg_tcpip_driver_same54
+#define MG_TCPIP_DRIVER_NAME "same54"
+
+#endif
+
+
+#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_STM32F) && \
+    MG_ENABLE_DRIVER_STM32F
 
 struct mg_tcpip_driver_stm32f_data {
   // MDC clock divider. MDC clock is derived from HCLK, must not exceed 2.5MHz
@@ -2909,6 +3023,32 @@ struct mg_tcpip_driver_stm32f_data {
   uint8_t phy_addr;  // PHY address
 };
 
+#ifndef MG_MAC_ADDRESS
+#define MG_MAC_ADDRESS MG_MAC_ADDRESS_RANDOM
+#endif
+
+#ifndef MG_TCPIP_PHY_ADDR
+#define MG_TCPIP_PHY_ADDR 0
+#endif
+
+#ifndef MG_DRIVER_MDC_CR
+#define MG_DRIVER_MDC_CR 4
+#endif
+
+#define MG_TCPIP_DRIVER_DATA                                \
+  static struct mg_tcpip_driver_stm32f_data driver_data = { \
+      .mdc_cr = MG_DRIVER_MDC_CR,                            \
+      .phy_addr = MG_TCPIP_PHY_ADDR,                        \
+  };
+
+#define MG_TCPIP_DRIVER_CODE &mg_tcpip_driver_stm32f
+#define MG_TCPIP_DRIVER_NAME "stm32f"
+
+#endif
+
+
+#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_STM32H) && \
+    MG_ENABLE_DRIVER_STM32H
 
 struct mg_tcpip_driver_stm32h_data {
   // MDC clock divider. MDC clock is derived from HCLK, must not exceed 2.5MHz
@@ -2925,6 +3065,26 @@ struct mg_tcpip_driver_stm32h_data {
   int mdc_cr;  // Valid values: -1, 0, 1, 2, 3, 4, 5
 };
 
+#ifndef MG_MAC_ADDRESS
+#define MG_MAC_ADDRESS MG_MAC_ADDRESS_RANDOM
+#endif
+
+#ifndef MG_DRIVER_MDC_CR
+#define MG_DRIVER_MDC_CR 4
+#endif
+
+#define MG_TCPIP_DRIVER_DATA                                \
+  static struct mg_tcpip_driver_stm32h_data driver_data = { \
+      .mdc_cr = MG_DRIVER_MDC_CR,                            \
+  };
+
+#define MG_TCPIP_DRIVER_CODE &mg_tcpip_driver_stm32h
+#define MG_TCPIP_DRIVER_NAME "stm32h"
+
+#endif
+
+
+#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_TM4C) && MG_ENABLE_DRIVER_TM4C
 
 struct mg_tcpip_driver_tm4c_data {
   // MDC clock divider. MDC clock is derived from SYSCLK, must not exceed 2.5MHz
@@ -2939,6 +3099,33 @@ struct mg_tcpip_driver_tm4c_data {
   int mdc_cr;  // Valid values: -1, 0, 1, 2, 3
 };
 
+#ifndef MG_MAC_ADDRESS
+#define MG_MAC_ADDRESS MG_MAC_ADDRESS_RANDOM
+#endif
+
+#ifndef MG_DRIVER_MDC_CR
+#define MG_DRIVER_MDC_CR 1
+#endif
+
+#define MG_TCPIP_DRIVER_DATA                                \
+  static struct mg_tcpip_driver_tm4c_data driver_data = { \
+      .mdc_cr = MG_DRIVER_MDC_CR,                            \
+  };
+
+#define MG_TCPIP_DRIVER_CODE &mg_tcpip_driver_tm4c
+#define MG_TCPIP_DRIVER_NAME "tm4c"
+
+
+#endif
+
+
+#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_W5500) && MG_ENABLE_DRIVER_W5500
+
+#undef MG_ENABLE_TCPIP_DRIVER_INIT
+#define MG_ENABLE_TCPIP_DRIVER_INIT 0
+
+#endif
+
 #ifdef __cplusplus
 }
 #endif

src/config.h

@@ -157,3 +157,25 @@
 #ifndef MG_ENABLE_PROFILE
 #define MG_ENABLE_PROFILE 0
 #endif
+
+#ifndef MG_ENABLE_TCPIP_DRIVER_INIT    // mg_mgr_init() will also initialize
+#define MG_ENABLE_TCPIP_DRIVER_INIT 1  // enabled built-in driver for
+#endif                                 // Mongoose built-in network stack
+
+#ifndef MG_TCPIP_IP  // e.g. MG_IPV4(192, 168, 0, 223)
+#define MG_TCPIP_IP MG_IPV4(0, 0, 0, 0)  // or leave as 0 for DHCP
+#endif
+
+#ifndef MG_TCPIP_MASK
+#define MG_TCPIP_MASK MG_IPV4(255, 255, 255, 0)
+#endif
+
+#ifndef MG_TCPIP_GW
+#define MG_TCPIP_GW MG_IPV4(0, 0, 0, 1)
+#endif
+
+#define MG_MAC_ADDRESS_RANDOM { 0, 0, 0, 0, 0, 0 }
+
+#ifndef MG_ENABLE_TCPIP_PRINT_DEBUG_STATS
+#define MG_ENABLE_TCPIP_PRINT_DEBUG_STATS 0
+#endif

src/drivers/cmsis.h

@@ -5,4 +5,13 @@
 #include "Driver_ETH_MAC.h"  // keep this include
 #include "Driver_ETH_PHY.h"  // keep this include
 
+#ifndef MG_MAC_ADDRESS
+#define MG_MAC_ADDRESS MG_MAC_ADDRESS_RANDOM
+#endif
+
+#define MG_TCPIP_DRIVER_DATA int driver_data;
+
+#define MG_TCPIP_DRIVER_CODE &mg_tcpip_driver_cmsis
+#define MG_TCPIP_DRIVER_NAME "cmsis"
+
 #endif

src/drivers/imxrt.c

@@ -1,4 +1,4 @@
-#include "tcpip.h"
+#include "net_builtin.h"
 
 #if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_IMXRT) && MG_ENABLE_DRIVER_IMXRT
 struct imxrt_enet {

src/drivers/imxrt.h

@@ -1,5 +1,7 @@
 #pragma once
 
+#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_IMXRT) && MG_ENABLE_DRIVER_IMXRT
+
 struct mg_tcpip_driver_imxrt_data {
   // MDC clock divider. MDC clock is derived from IPS Bus clock (ipg_clk),
   // must not exceed 2.5MHz. Configuration for clock range 2.36~2.50 MHz
@@ -16,3 +18,26 @@ struct mg_tcpip_driver_imxrt_data {
 
   uint8_t phy_addr;  // PHY address
 };
+
+#ifndef MG_MAC_ADDRESS
+#define MG_MAC_ADDRESS MG_MAC_ADDRESS_RANDOM
+#endif
+
+#ifndef MG_TCPIP_PHY_ADDR
+#define MG_TCPIP_PHY_ADDR 2
+#endif
+
+#ifndef MG_DRIVER_MDC_CR
+#define MG_DRIVER_MDC_CR 24
+#endif
+
+#define MG_TCPIP_DRIVER_DATA                                \
+  static struct mg_tcpip_driver_imxrt_data driver_data = { \
+      .mdc_cr = MG_DRIVER_MDC_CR,                            \
+      .phy_addr = MG_TCPIP_PHY_ADDR,                        \
+  };
+
+#define MG_TCPIP_DRIVER_CODE &mg_tcpip_driver_imxrt
+#define MG_TCPIP_DRIVER_NAME "imxrt"
+
+#endif

src/drivers/ra.h

@@ -1,8 +1,41 @@
 #pragma once
 
+#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_RA) && MG_ENABLE_DRIVER_RA
+
 struct mg_tcpip_driver_ra_data {
   // MDC clock "divider". MDC clock is software generated,
   uint32_t clock;    // core clock frequency in Hz
   uint16_t irqno;    // IRQn, R_ICU->IELSR[irqno]
   uint8_t phy_addr;  // PHY address
 };
+
+#undef MG_ENABLE_TCPIP_DRIVER_INIT
+#define MG_ENABLE_TCPIP_DRIVER_INIT 0  // TODO(): needs SystemCoreClock
+#if 0
+#ifndef MG_MAC_ADDRESS
+#define MG_MAC_ADDRESS MG_MAC_ADDRESS_RANDOM
+#endif
+
+#ifndef MG_TCPIP_PHY_ADDR
+#define MG_TCPIP_PHY_ADDR 1
+#endif
+
+#ifndef MG_DRIVER_RA_CLOCK
+#define MG_DRIVER_RA_CLOCK
+#endif
+
+#ifndef MG_DRIVER_RA_IRQNO
+#define MG_DRIVER_RA_IRQNO 0
+#endif
+
+#define MG_TCPIP_DRIVER_DATA                                \
+  static struct mg_tcpip_driver_ra_data driver_data = { \
+      .clock = MG_DRIVER_RA_CLOCK,                            \
+      .irqno = MG_DRIVER_RA_CLOCK,                            \
+      .phy_addr = MG_TCPIP_PHY_ADDR,                        \
+  };
+
+#define MG_TCPIP_DRIVER_CODE &mg_tcpip_driver_ra
+#define MG_TCPIP_DRIVER_NAME "ra"
+#endif
+#endif

src/drivers/same54.c

@@ -1,6 +1,7 @@
-#include "tcpip.h"
+#include "net_builtin.h"
+
+#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_SAME54) && MG_ENABLE_DRIVER_SAME54
 
-#if defined(MG_ENABLE_DRIVER_SAME54) && MG_ENABLE_DRIVER_SAME54
 #include <sam.h>
 
 #define ETH_PKT_SIZE 1536  // Max frame size

src/drivers/same54.h

@@ -1,5 +1,25 @@
 #pragma once
 
+#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_SAME54) && MG_ENABLE_DRIVER_SAME54
+
 struct mg_tcpip_driver_same54_data {
     int mdc_cr;
 };
+
+#ifndef MG_MAC_ADDRESS
+#define MG_MAC_ADDRESS MG_MAC_ADDRESS_RANDOM
+#endif
+
+#ifndef MG_DRIVER_MDC_CR
+#define MG_DRIVER_MDC_CR 5
+#endif
+
+#define MG_TCPIP_DRIVER_DATA                                \
+  static struct mg_tcpip_driver_same54_data driver_data = { \
+      .mdc_cr = MG_DRIVER_MDC_CR,                            \
+  };
+
+#define MG_TCPIP_DRIVER_CODE &mg_tcpip_driver_same54
+#define MG_TCPIP_DRIVER_NAME "same54"
+
+#endif

src/drivers/stm32f.h

@@ -1,5 +1,8 @@
 #pragma once
 
+#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_STM32F) && \
+    MG_ENABLE_DRIVER_STM32F
+
 struct mg_tcpip_driver_stm32f_data {
   // MDC clock divider. MDC clock is derived from HCLK, must not exceed 2.5MHz
   //    HCLK range    DIVIDER    mdc_cr VALUE
@@ -16,3 +19,26 @@ struct mg_tcpip_driver_stm32f_data {
 
   uint8_t phy_addr;  // PHY address
 };
+
+#ifndef MG_MAC_ADDRESS
+#define MG_MAC_ADDRESS MG_MAC_ADDRESS_RANDOM
+#endif
+
+#ifndef MG_TCPIP_PHY_ADDR
+#define MG_TCPIP_PHY_ADDR 0
+#endif
+
+#ifndef MG_DRIVER_MDC_CR
+#define MG_DRIVER_MDC_CR 4
+#endif
+
+#define MG_TCPIP_DRIVER_DATA                                \
+  static struct mg_tcpip_driver_stm32f_data driver_data = { \
+      .mdc_cr = MG_DRIVER_MDC_CR,                            \
+      .phy_addr = MG_TCPIP_PHY_ADDR,                        \
+  };
+
+#define MG_TCPIP_DRIVER_CODE &mg_tcpip_driver_stm32f
+#define MG_TCPIP_DRIVER_NAME "stm32f"
+
+#endif

src/drivers/stm32h.h

@@ -1,5 +1,8 @@
 #pragma once
 
+#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_STM32H) && \
+    MG_ENABLE_DRIVER_STM32H
+
 struct mg_tcpip_driver_stm32h_data {
   // MDC clock divider. MDC clock is derived from HCLK, must not exceed 2.5MHz
   //    HCLK range    DIVIDER    mdc_cr VALUE
@@ -14,3 +17,21 @@ struct mg_tcpip_driver_stm32h_data {
   //    110, 111 Reserved
   int mdc_cr;  // Valid values: -1, 0, 1, 2, 3, 4, 5
 };
+
+#ifndef MG_MAC_ADDRESS
+#define MG_MAC_ADDRESS MG_MAC_ADDRESS_RANDOM
+#endif
+
+#ifndef MG_DRIVER_MDC_CR
+#define MG_DRIVER_MDC_CR 4
+#endif
+
+#define MG_TCPIP_DRIVER_DATA                                \
+  static struct mg_tcpip_driver_stm32h_data driver_data = { \
+      .mdc_cr = MG_DRIVER_MDC_CR,                            \
+  };
+
+#define MG_TCPIP_DRIVER_CODE &mg_tcpip_driver_stm32h
+#define MG_TCPIP_DRIVER_NAME "stm32h"
+
+#endif

src/drivers/tm4c.c

@@ -1,4 +1,4 @@
-#include "tcpip.h"
+#include "net_builtin.h"
 
 #if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_TM4C) && MG_ENABLE_DRIVER_TM4C
 struct tm4c_emac {

src/drivers/tm4c.h

@@ -1,5 +1,7 @@
 #pragma once
 
+#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_TM4C) && MG_ENABLE_DRIVER_TM4C
+
 struct mg_tcpip_driver_tm4c_data {
   // MDC clock divider. MDC clock is derived from SYSCLK, must not exceed 2.5MHz
   //    SYSCLK range   DIVIDER   mdc_cr VALUE
@@ -12,3 +14,22 @@ struct mg_tcpip_driver_tm4c_data {
   //    0x4-0xF Reserved
   int mdc_cr;  // Valid values: -1, 0, 1, 2, 3
 };
+
+#ifndef MG_MAC_ADDRESS
+#define MG_MAC_ADDRESS MG_MAC_ADDRESS_RANDOM
+#endif
+
+#ifndef MG_DRIVER_MDC_CR
+#define MG_DRIVER_MDC_CR 1
+#endif
+
+#define MG_TCPIP_DRIVER_DATA                                \
+  static struct mg_tcpip_driver_tm4c_data driver_data = { \
+      .mdc_cr = MG_DRIVER_MDC_CR,                            \
+  };
+
+#define MG_TCPIP_DRIVER_CODE &mg_tcpip_driver_tm4c
+#define MG_TCPIP_DRIVER_NAME "tm4c"
+
+
+#endif

src/drivers/w5500.c

@@ -1,6 +1,6 @@
-#include "tcpip.h"
+#include "net_builtin.h"
 
-#if MG_ENABLE_TCPIP
+#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_W5500) && MG_ENABLE_DRIVER_W5500
 
 enum { W5500_CR = 0, W5500_S0 = 1, W5500_TX0 = 2, W5500_RX0 = 3 };
 

src/net.c

@@ -252,6 +252,11 @@ void mg_mgr_free(struct mg_mgr *mgr) {
   mg_tls_ctx_free(mgr);
 }
 
+
+#if MG_ENABLE_TCPIP && MG_ENABLE_TCPIP_DRIVER_INIT
+void mg_tcpip_auto_init(struct mg_mgr *);
+#endif
+
 void mg_mgr_init(struct mg_mgr *mgr) {
   memset(mgr, 0, sizeof(*mgr));
 #if MG_ENABLE_EPOLL
@@ -270,6 +275,8 @@ void mg_mgr_init(struct mg_mgr *mgr) {
   // Ignore SIGPIPE signal, so if client cancels the request, it
   // won't kill the whole process.
   signal(SIGPIPE, SIG_IGN);
+#elif MG_ENABLE_TCPIP && MG_ENABLE_TCPIP_DRIVER_INIT
+  mg_tcpip_auto_init(mgr);
 #endif
   mgr->pipe = MG_INVALID_SOCKET;
   mgr->dnstimeout = 3000;

src/net_builtin.c

@@ -865,6 +865,14 @@ static void mg_tcpip_poll(struct mg_tcpip_if *ifp, uint64_t now) {
   bool expired_1000ms = mg_timer_expired(&ifp->timer_1000ms, 1000, now);
   ifp->now = now;
 
+#if MG_ENABLE_TCPIP_PRINT_DEBUG_STATS
+  if (expired_1000ms) {
+    const char *names[] = {"down", "up", "req", "ready"};
+    MG_INFO(("Ethernet: %s, IP: %M, rx:%u, tx:%u, dr:%u, er:%u",
+             names[ifp->state], mg_print_ip4, &ifp->ip, ifp->nrecv, ifp->nsent,
+             ifp->ndrop, ifp->nerr));
+  }
+#endif
   // Handle physical interface up/down status
   if (expired_1000ms && ifp->driver->up) {
     bool up = ifp->driver->up(ifp);
@@ -1125,4 +1133,22 @@ bool mg_send(struct mg_connection *c, const void *buf, size_t len) {
   }
   return res;
 }
+
+#if MG_ENABLE_TCPIP_DRIVER_INIT && defined(MG_TCPIP_DRIVER_DATA)
+void mg_tcpip_auto_init(struct mg_mgr *mgr);
+void mg_tcpip_auto_init(struct mg_mgr *mgr) {
+  MG_TCPIP_DRIVER_DATA  // static ... driver_data
+      struct mg_tcpip_if i = {
+          // let the compiler solve the macros at run time
+          .mac = MG_MAC_ADDRESS,          .ip = MG_TCPIP_IP,
+          .mask = MG_TCPIP_MASK,          .gw = MG_TCPIP_GW,
+          .driver = MG_TCPIP_DRIVER_CODE, .driver_data = &driver_data,
+      };
+  static struct mg_tcpip_if mif;
+
+  mif = i;  // copy the initialized structure to a static to be exported
+  mg_tcpip_init(mgr, &mif);
+  MG_INFO(("Driver: " MG_TCPIP_DRIVER_NAME ", MAC: %M", mg_print_mac, mif.mac));
+}
+#endif
 #endif  // MG_ENABLE_TCPIP

src/util.h

@@ -27,6 +27,8 @@ uint64_t mg_now(void);     // Return milliseconds since Epoch
   (((uint32_t) ((a) & 255) << 24) | ((uint32_t) ((b) & 255) << 16) | \
    ((uint32_t) ((c) & 255) << 8) | (uint32_t) ((d) & 255))
 
+#define MG_IPV4(a, b, c, d) mg_htonl(MG_U32(a, b, c, d))
+
 // For printing IPv4 addresses: printf("%d.%d.%d.%d\n", MG_IPADDR_PARTS(&ip))
 #define MG_U8P(ADDR) ((uint8_t *) (ADDR))
 #define MG_IPADDR_PARTS(ADDR) \

test/mip_tap_test.c

@@ -1,4 +1,5 @@
 #define MG_ENABLE_TCPIP 1
+#define MG_ENABLE_TCPIP_DRIVER_INIT 0
 #define MG_ENABLE_SOCKET 0
 #define MG_USING_DHCP 1
 #define MG_ENABLE_PACKED_FS 0

test/mip_test.c

@@ -1,6 +1,7 @@
 #define MG_ENABLE_SOCKET 0
 #define MG_ENABLE_LINES 1
 #define MG_ENABLE_TCPIP 1
+#define MG_ENABLE_TCPIP_DRIVER_INIT 0
 #define MG_ENABLE_PACKED_FS 0
 
 #include "mongoose.c"