mirror of
https://github.com/cesanta/mongoose.git
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Refactor W5500 driver, add arduino w5500 example
This commit is contained in:
cpq
parent
f7f7319698
commit
567fccd7ee
@ -1,8 +1,23 @@
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#include "mip.h"
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#if MG_ENABLE_MIP
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static void mip_driver_enc28j60_init(uint8_t *mac, void *data) {
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// Instruction set
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enum { OP_RCR, OP_RBM, OP_WCR, OP_WBM, OP_BFS, OP_BFC, OP_SRC };
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static uint8_t rd(struct mip_spi *spi, uint8_t op, uint8_t addr) {
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spi->begin(spi->spi);
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spi->txn(spi->spi, (uint8_t) ((op << 5) | (addr & 0x1f)));
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uint8_t value = spi->txn(spi->spi, 255);
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if (addr & 0x80) value = spi->txn(spi->spi, 255);
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spi->end(spi->spi);
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return value;
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}
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static bool mip_driver_enc28j60_init(uint8_t *mac, void *data) {
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(void) mac, (void) data;
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rd(data, OP_SRC, 0x1f);
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return false;
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}
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static size_t mip_driver_enc28j60_tx(const void *buf, size_t len, void *data) {
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@ -50,7 +50,7 @@ static void eth_write_phy(uint8_t addr, uint8_t reg, uint32_t val) {
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while (ETH->MACMIIAR & BIT(0)) spin(1);
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}
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static void mip_driver_stm32_init(uint8_t *mac, void *userdata) {
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static bool mip_driver_stm32_init(uint8_t *mac, void *userdata) {
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// Init RX descriptors
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for (int i = 0; i < ETH_DESC_CNT; i++) {
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s_rxdesc[i][0] = BIT(31); // Own
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@ -86,6 +86,7 @@ static void mip_driver_stm32_init(uint8_t *mac, void *userdata) {
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// TODO(cpq): setup MAC filtering
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(void) userdata, (void) mac;
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return true;
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}
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static void mip_driver_stm32_setrx(void (*rx)(void *, size_t, void *),
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@ -1,99 +1,86 @@
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// Copyright (c) 2022 Cesanta Software Limited
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// All rights reserved
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//
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// This software is dual-licensed: you can redistribute it and/or modify
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// it under the terms of the GNU Affero General Public License version 3 as
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// published by the Free Software Foundation. For the terms of this
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// license, see http://www.fsf.org/licensing/licenses/agpl-3.0.html
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//
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// You are free to use this software under the terms of the GNU General
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// Public License, but WITHOUT ANY WARRANTY; without even the implied
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// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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// See the GNU General Public License for more details.
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//
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// Alternatively, you can license this software under a commercial
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// license, please contact us at https://cesanta.com/contact.html
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#include "mip.h"
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#pragma once
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struct w5500 {
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uint8_t mac[6]; // MAC address
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void *spi; // Opaque SPI bus descriptor
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uint8_t (*txn)(void *, uint8_t); // SPI transaction
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void (*begin)(void *); // SPI begin
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void (*end)(void *); // SPI end
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};
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#if MG_ENABLE_MIP
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enum { W5500_CR = 0, W5500_S0 = 1, W5500_TX0 = 2, W5500_RX0 = 3 };
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static inline void w5500_txn(struct w5500 *w, uint8_t block, uint16_t addr,
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bool wr, void *buf, size_t len) {
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static void w5500_txn(struct mip_spi *s, uint8_t block, uint16_t addr, bool wr,
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void *buf, size_t len) {
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uint8_t *p = buf, cmd[] = {(uint8_t) (addr >> 8), (uint8_t) (addr & 255),
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(uint8_t) ((block << 3) | (wr ? 4 : 0))};
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w->begin(w->spi);
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for (size_t i = 0; i < sizeof(cmd); i++) w->txn(w->spi, cmd[i]);
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s->begin(s->spi);
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for (size_t i = 0; i < sizeof(cmd); i++) s->txn(s->spi, cmd[i]);
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for (size_t i = 0; i < len; i++) {
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uint8_t r = w->txn(w->spi, p[i]);
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uint8_t r = s->txn(s->spi, p[i]);
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if (!wr) p[i] = r;
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}
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w->end(w->spi);
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s->end(s->spi);
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}
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// clang-format off
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static inline void w5500_wn(struct w5500 *w, uint8_t block, uint16_t addr, void *buf, size_t len) { w5500_txn(w, block, addr, true, buf, len); }
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static inline void w5500_w1(struct w5500 *w, uint8_t block, uint16_t addr, uint8_t val) { w5500_wn(w, block, addr, &val, 1); }
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static inline void w5500_w2(struct w5500 *w, uint8_t block, uint16_t addr, uint16_t val) { uint8_t buf[2] = {(uint8_t) (val >> 8), (uint8_t) (val & 255)}; w5500_wn(w, block, addr, buf, sizeof(buf)); }
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static inline void w5500_rn(struct w5500 *w, uint8_t block, uint16_t addr, void *buf, size_t len) { w5500_txn(w, block, addr, false, buf, len); }
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static inline uint8_t w5500_r1(struct w5500 *w, uint8_t block, uint16_t addr) { uint8_t r = 0; w5500_rn(w, block, addr, &r, 1); return r; }
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static inline uint16_t w5500_r2(struct w5500 *w, uint8_t block, uint16_t addr) { uint8_t buf[2] = {0, 0}; w5500_rn(w, block, addr, buf, sizeof(buf)); return (uint16_t) ((buf[0] << 8) | buf[1]); }
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static void w5500_wn(struct mip_spi *s, uint8_t block, uint16_t addr, void *buf, size_t len) { w5500_txn(s, block, addr, true, buf, len); }
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static void w5500_w1(struct mip_spi *s, uint8_t block, uint16_t addr, uint8_t val) { w5500_wn(s, block, addr, &val, 1); }
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static void w5500_w2(struct mip_spi *s, uint8_t block, uint16_t addr, uint16_t val) { uint8_t buf[2] = {(uint8_t) (val >> 8), (uint8_t) (val & 255)}; w5500_wn(s, block, addr, buf, sizeof(buf)); }
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static void w5500_rn(struct mip_spi *s, uint8_t block, uint16_t addr, void *buf, size_t len) { w5500_txn(s, block, addr, false, buf, len); }
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static uint8_t w5500_r1(struct mip_spi *s, uint8_t block, uint16_t addr) { uint8_t r = 0; w5500_rn(s, block, addr, &r, 1); return r; }
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static uint16_t w5500_r2(struct mip_spi *s, uint8_t block, uint16_t addr) { uint8_t buf[2] = {0, 0}; w5500_rn(s, block, addr, buf, sizeof(buf)); return (uint16_t) ((buf[0] << 8) | buf[1]); }
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// clang-format on
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static inline uint8_t w5500_status(struct w5500 *w) {
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return w5500_r1(w, W5500_CR, 0x2e);
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}
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static inline uint16_t w5500_rx(struct w5500 *w, uint8_t *buf, uint16_t len) {
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uint16_t r = 0, n = 0, n2; // Read recv len
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while ((n2 = w5500_r2(w, W5500_S0, 0x26)) > n) n = n2; // Until it is stable
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static size_t w5500_rx(void *buf, size_t buflen, void *data) {
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struct mip_spi *s = (struct mip_spi *) data;
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uint16_t r = 0, n = 0, len = (uint16_t) buflen, n2; // Read recv len
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while ((n2 = w5500_r2(s, W5500_S0, 0x26)) > n) n = n2; // Until it is stable
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// printf("RSR: %d\n", (int) n);
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if (n > 0) {
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uint16_t ptr = w5500_r2(w, W5500_S0, 0x28); // Get read pointer
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n = w5500_r2(w, W5500_RX0, ptr); // Read frame length
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if (n <= len + 2) r = n - 2, w5500_rn(w, W5500_RX0, ptr + 2, buf, r);
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w5500_w2(w, W5500_S0, 0x28, ptr + n); // Advance read pointer
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w5500_w1(w, W5500_S0, 1, 0x40); // Sock0 CR -> RECV
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uint16_t ptr = w5500_r2(s, W5500_S0, 0x28); // Get read pointer
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n = w5500_r2(s, W5500_RX0, ptr); // Read frame length
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if (n <= len + 2) r = n - 2, w5500_rn(s, W5500_RX0, ptr + 2, buf, r);
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w5500_w2(s, W5500_S0, 0x28, ptr + n); // Advance read pointer
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w5500_w1(s, W5500_S0, 1, 0x40); // Sock0 CR -> RECV
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// printf(" RX_RD: tot=%u n=%u r=%u\n", n2, n, r);
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}
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return r;
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}
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static inline uint16_t w5500_tx(struct w5500 *w, void *buf, uint16_t len) {
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uint16_t n = 0;
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while (n < len) n = w5500_r2(w, W5500_S0, 0x20); // Wait for space
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uint16_t ptr = w5500_r2(w, W5500_S0, 0x24); // Get write pointer
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w5500_wn(w, W5500_TX0, ptr, buf, len); // Write data
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w5500_w2(w, W5500_S0, 0x24, ptr + len); // Advance write pointer
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w5500_w1(w, W5500_S0, 1, 0x20); // Sock0 CR -> SEND
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static size_t w5500_tx(const void *buf, size_t buflen, void *data) {
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struct mip_spi *s = (struct mip_spi *) data;
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uint16_t n = 0, len = (uint16_t) buflen;
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while (n < len) n = w5500_r2(s, W5500_S0, 0x20); // Wait for space
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uint16_t ptr = w5500_r2(s, W5500_S0, 0x24); // Get write pointer
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w5500_wn(s, W5500_TX0, ptr, (void *) buf, len); // Write data
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w5500_w2(s, W5500_S0, 0x24, ptr + len); // Advance write pointer
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w5500_w1(s, W5500_S0, 1, 0x20); // Sock0 CR -> SEND
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for (int i = 0; i < 40; i++) {
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uint8_t ir = w5500_r1(w, W5500_S0, 2); // Read S0 IR
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uint8_t ir = w5500_r1(s, W5500_S0, 2); // Read S0 IR
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if (ir == 0) continue;
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// printf("IR %d, len=%d, free=%d, ptr %d\n", ir, (int) len, (int) n, ptr);
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w5500_w1(w, W5500_S0, 2, ir); // Write S0 IR: clear it!
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w5500_w1(s, W5500_S0, 2, ir); // Write S0 IR: clear it!
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if (ir & 8) len = 0; // Timeout. Report error
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if (ir & (16 | 8)) break; // Stop on SEND_OK or timeout
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}
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return len;
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}
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static inline bool w5500_init(struct w5500 *w) {
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w->end(w->spi);
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w5500_w1(w, W5500_CR, 0, 0x80); // Reset chip: CR -> 0x80
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w5500_w1(w, W5500_CR, 0x2e, 0); // CR PHYCFGR -> reset
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w5500_w1(w, W5500_CR, 0x2e, 0xf8); // CR PHYCFGR -> set
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// w5500_wn(w, W5500_CR, 9, w->mac, 6); // Set source MAC
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w5500_w1(w, W5500_S0, 0x1e, 16); // Sock0 RX buf size
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w5500_w1(w, W5500_S0, 0x1f, 16); // Sock0 TX buf size
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w5500_w1(w, W5500_S0, 0, 4); // Sock0 MR -> MACRAW
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w5500_w1(w, W5500_S0, 1, 1); // Sock0 CR -> OPEN
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return w5500_r1(w, W5500_S0, 3) == 0x42; // Sock0 SR == MACRAW
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static bool w5500_init(uint8_t *mac, void *data) {
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struct mip_spi *s = (struct mip_spi *) data;
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s->end(s->spi);
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w5500_w1(s, W5500_CR, 0, 0x80); // Reset chip: CR -> 0x80
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w5500_w1(s, W5500_CR, 0x2e, 0); // CR PHYCFGR -> reset
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w5500_w1(s, W5500_CR, 0x2e, 0xf8); // CR PHYCFGR -> set
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// w5500_wn(s, W5500_CR, 9, s->mac, 6); // Set source MAC
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w5500_w1(s, W5500_S0, 0x1e, 16); // Sock0 RX buf size
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w5500_w1(s, W5500_S0, 0x1f, 16); // Sock0 TX buf size
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w5500_w1(s, W5500_S0, 0, 4); // Sock0 MR -> MACRAW
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w5500_w1(s, W5500_S0, 1, 1); // Sock0 CR -> OPEN
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return w5500_r1(s, W5500_S0, 3) == 0x42; // Sock0 SR == MACRAW
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(void) mac;
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}
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static bool w5500_up(void *data) {
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uint8_t phycfgr = w5500_r1((struct mip_spi *) data, W5500_CR, 0x2e);
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return phycfgr & 1; // Bit 0 of PHYCFGR is LNK (0 - down, 1 - up)
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}
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struct mip_driver mip_driver_w5500 = {
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.init = w5500_init, .tx = w5500_tx, .rx = w5500_rx, .up = w5500_up};
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#endif
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39
mip/mip.c
39
mip/mip.c
@ -2,7 +2,7 @@
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#if MG_ENABLE_MIP
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#if defined(_MSC_VER)
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#if defined(_MSC_VER) || defined(ARDUINO)
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#define _Atomic
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#else
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#include <stdatomic.h>
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@ -713,23 +713,26 @@ static void on_rx(void *buf, size_t len, void *userdata) {
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void mip_init(struct mg_mgr *mgr, struct mip_cfg *ipcfg,
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struct mip_driver *driver, void *driver_data) {
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size_t maxpktsize = 1500, qlen = driver->setrx ? 1024 * 16 : 0;
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struct mip_if *ifp =
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(struct mip_if *) calloc(1, sizeof(*ifp) + 2 * maxpktsize + qlen);
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memcpy(ifp->mac, ipcfg->mac, sizeof(ifp->mac));
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ifp->use_dhcp = ipcfg->ip == 0;
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ifp->ip = ipcfg->ip, ifp->mask = ipcfg->mask, ifp->gw = ipcfg->gw;
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ifp->rx.buf = (uint8_t *) (ifp + 1), ifp->rx.len = maxpktsize;
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ifp->tx.buf = ifp->rx.buf + maxpktsize, ifp->tx.len = maxpktsize;
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ifp->driver = driver;
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ifp->driver_data = driver_data;
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ifp->mgr = mgr;
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ifp->queue.buf = ifp->tx.buf + maxpktsize;
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ifp->queue.len = qlen;
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if (driver->init) driver->init(ipcfg->mac, driver_data);
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if (driver->setrx) driver->setrx(on_rx, ifp);
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mgr->priv = ifp;
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mgr->extraconnsize = sizeof(struct tcpstate);
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if (driver->init && !driver->init(ipcfg->mac, driver_data)) {
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MG_ERROR(("driver init failed"));
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} else {
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size_t maxpktsize = 1500, qlen = driver->setrx ? 1024 * 16 : 0;
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struct mip_if *ifp =
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(struct mip_if *) calloc(1, sizeof(*ifp) + 2 * maxpktsize + qlen);
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memcpy(ifp->mac, ipcfg->mac, sizeof(ifp->mac));
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ifp->use_dhcp = ipcfg->ip == 0;
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ifp->ip = ipcfg->ip, ifp->mask = ipcfg->mask, ifp->gw = ipcfg->gw;
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ifp->rx.buf = (uint8_t *) (ifp + 1), ifp->rx.len = maxpktsize;
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ifp->tx.buf = ifp->rx.buf + maxpktsize, ifp->tx.len = maxpktsize;
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ifp->driver = driver;
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ifp->driver_data = driver_data;
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ifp->mgr = mgr;
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ifp->queue.buf = ifp->tx.buf + maxpktsize;
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ifp->queue.len = qlen;
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if (driver->setrx) driver->setrx(on_rx, ifp);
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mgr->priv = ifp;
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mgr->extraconnsize = sizeof(struct tcpstate);
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}
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}
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int mg_mkpipe(struct mg_mgr *m, mg_event_handler_t fn, void *d, bool udp) {
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@ -4,7 +4,7 @@
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#include "net.h"
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struct mip_driver {
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void (*init)(uint8_t *mac, void *data); // Initialise driver
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bool (*init)(uint8_t *mac, void *data); // Initialise driver
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size_t (*tx)(const void *, size_t, void *data); // Transmit frame
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size_t (*rx)(void *buf, size_t len, void *data); // Receive frame (polling)
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bool (*up)(void *data); // Up/down status
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@ -21,11 +21,12 @@ void mip_init(struct mg_mgr *, struct mip_cfg *, struct mip_driver *, void *);
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extern struct mip_driver mip_driver_stm32;
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extern struct mip_driver mip_driver_enc28j60;
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extern struct mip_driver mip_driver_w5500;
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// Drivers that require SPI, can use this SPI abstraction
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struct mip_spi {
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void *spi; // Opaque SPI bus descriptor
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uint8_t (*txn)(void *, uint8_t); // SPI transaction: write 1 byte, read reply
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void (*begin)(void *); // SPI begin: slave select low
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void (*end)(void *); // SPI end: slave select high
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uint8_t (*txn)(void *, uint8_t); // SPI transaction: write 1 byte, read reply
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};
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151
mongoose.c
151
mongoose.c
@ -5622,6 +5622,8 @@ uint64_t mg_millis(void) {
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clock_gettime(CLOCK_REALTIME, &ts);
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#endif
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return ((uint64_t) ts.tv_sec * 1000 + (uint64_t) ts.tv_nsec / 1000000);
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#elif defined(ARDUINO)
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return (uint64_t) millis();
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#else
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return (uint64_t) (time(NULL) * 1000);
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#endif
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@ -5932,8 +5934,23 @@ size_t mg_ws_wrap(struct mg_connection *c, size_t len, int op) {
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#if MG_ENABLE_MIP
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static void mip_driver_enc28j60_init(uint8_t *mac, void *data) {
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// Instruction set
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enum { OP_RCR, OP_RBM, OP_WCR, OP_WBM, OP_BFS, OP_BFC, OP_SRC };
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static uint8_t rd(struct mip_spi *spi, uint8_t op, uint8_t addr) {
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spi->begin(spi->spi);
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spi->txn(spi->spi, (uint8_t) ((op << 5) | (addr & 0x1f)));
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uint8_t value = spi->txn(spi->spi, 255);
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if (addr & 0x80) value = spi->txn(spi->spi, 255);
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spi->end(spi->spi);
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return value;
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}
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static bool mip_driver_enc28j60_init(uint8_t *mac, void *data) {
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(void) mac, (void) data;
|
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rd(data, OP_SRC, 0x1f);
|
||||
return false;
|
||||
}
|
||||
|
||||
static size_t mip_driver_enc28j60_tx(const void *buf, size_t len, void *data) {
|
||||
@ -6012,7 +6029,7 @@ static void eth_write_phy(uint8_t addr, uint8_t reg, uint32_t val) {
|
||||
while (ETH->MACMIIAR & BIT(0)) spin(1);
|
||||
}
|
||||
|
||||
static void mip_driver_stm32_init(uint8_t *mac, void *userdata) {
|
||||
static bool mip_driver_stm32_init(uint8_t *mac, void *userdata) {
|
||||
// Init RX descriptors
|
||||
for (int i = 0; i < ETH_DESC_CNT; i++) {
|
||||
s_rxdesc[i][0] = BIT(31); // Own
|
||||
@ -6048,6 +6065,7 @@ static void mip_driver_stm32_init(uint8_t *mac, void *userdata) {
|
||||
|
||||
// TODO(cpq): setup MAC filtering
|
||||
(void) userdata, (void) mac;
|
||||
return true;
|
||||
}
|
||||
|
||||
static void mip_driver_stm32_setrx(void (*rx)(void *, size_t, void *),
|
||||
@ -6107,6 +6125,96 @@ struct mip_driver mip_driver_stm32 = {.init = mip_driver_stm32_init,
|
||||
.up = mip_driver_stm32_up};
|
||||
#endif // MG_ENABLE_MIP
|
||||
|
||||
#ifdef MG_ENABLE_LINES
|
||||
#line 1 "mip/driver_w5500.c"
|
||||
#endif
|
||||
|
||||
|
||||
#if MG_ENABLE_MIP
|
||||
|
||||
enum { W5500_CR = 0, W5500_S0 = 1, W5500_TX0 = 2, W5500_RX0 = 3 };
|
||||
|
||||
static void w5500_txn(struct mip_spi *s, uint8_t block, uint16_t addr, bool wr,
|
||||
void *buf, size_t len) {
|
||||
uint8_t *p = buf, cmd[] = {(uint8_t) (addr >> 8), (uint8_t) (addr & 255),
|
||||
(uint8_t) ((block << 3) | (wr ? 4 : 0))};
|
||||
s->begin(s->spi);
|
||||
for (size_t i = 0; i < sizeof(cmd); i++) s->txn(s->spi, cmd[i]);
|
||||
for (size_t i = 0; i < len; i++) {
|
||||
uint8_t r = s->txn(s->spi, p[i]);
|
||||
if (!wr) p[i] = r;
|
||||
}
|
||||
s->end(s->spi);
|
||||
}
|
||||
|
||||
// clang-format off
|
||||
static void w5500_wn(struct mip_spi *s, uint8_t block, uint16_t addr, void *buf, size_t len) { w5500_txn(s, block, addr, true, buf, len); }
|
||||
static void w5500_w1(struct mip_spi *s, uint8_t block, uint16_t addr, uint8_t val) { w5500_wn(s, block, addr, &val, 1); }
|
||||
static void w5500_w2(struct mip_spi *s, uint8_t block, uint16_t addr, uint16_t val) { uint8_t buf[2] = {(uint8_t) (val >> 8), (uint8_t) (val & 255)}; w5500_wn(s, block, addr, buf, sizeof(buf)); }
|
||||
static void w5500_rn(struct mip_spi *s, uint8_t block, uint16_t addr, void *buf, size_t len) { w5500_txn(s, block, addr, false, buf, len); }
|
||||
static uint8_t w5500_r1(struct mip_spi *s, uint8_t block, uint16_t addr) { uint8_t r = 0; w5500_rn(s, block, addr, &r, 1); return r; }
|
||||
static uint16_t w5500_r2(struct mip_spi *s, uint8_t block, uint16_t addr) { uint8_t buf[2] = {0, 0}; w5500_rn(s, block, addr, buf, sizeof(buf)); return (uint16_t) ((buf[0] << 8) | buf[1]); }
|
||||
// clang-format on
|
||||
|
||||
static size_t w5500_rx(void *buf, size_t buflen, void *data) {
|
||||
struct mip_spi *s = (struct mip_spi *) data;
|
||||
uint16_t r = 0, n = 0, len = (uint16_t) buflen, n2; // Read recv len
|
||||
while ((n2 = w5500_r2(s, W5500_S0, 0x26)) > n) n = n2; // Until it is stable
|
||||
// printf("RSR: %d\n", (int) n);
|
||||
if (n > 0) {
|
||||
uint16_t ptr = w5500_r2(s, W5500_S0, 0x28); // Get read pointer
|
||||
n = w5500_r2(s, W5500_RX0, ptr); // Read frame length
|
||||
if (n <= len + 2) r = n - 2, w5500_rn(s, W5500_RX0, ptr + 2, buf, r);
|
||||
w5500_w2(s, W5500_S0, 0x28, ptr + n); // Advance read pointer
|
||||
w5500_w1(s, W5500_S0, 1, 0x40); // Sock0 CR -> RECV
|
||||
// printf(" RX_RD: tot=%u n=%u r=%u\n", n2, n, r);
|
||||
}
|
||||
return r;
|
||||
}
|
||||
|
||||
static size_t w5500_tx(const void *buf, size_t buflen, void *data) {
|
||||
struct mip_spi *s = (struct mip_spi *) data;
|
||||
uint16_t n = 0, len = (uint16_t) buflen;
|
||||
while (n < len) n = w5500_r2(s, W5500_S0, 0x20); // Wait for space
|
||||
uint16_t ptr = w5500_r2(s, W5500_S0, 0x24); // Get write pointer
|
||||
w5500_wn(s, W5500_TX0, ptr, (void *) buf, len); // Write data
|
||||
w5500_w2(s, W5500_S0, 0x24, ptr + len); // Advance write pointer
|
||||
w5500_w1(s, W5500_S0, 1, 0x20); // Sock0 CR -> SEND
|
||||
for (int i = 0; i < 40; i++) {
|
||||
uint8_t ir = w5500_r1(s, W5500_S0, 2); // Read S0 IR
|
||||
if (ir == 0) continue;
|
||||
// printf("IR %d, len=%d, free=%d, ptr %d\n", ir, (int) len, (int) n, ptr);
|
||||
w5500_w1(s, W5500_S0, 2, ir); // Write S0 IR: clear it!
|
||||
if (ir & 8) len = 0; // Timeout. Report error
|
||||
if (ir & (16 | 8)) break; // Stop on SEND_OK or timeout
|
||||
}
|
||||
return len;
|
||||
}
|
||||
|
||||
static bool w5500_init(uint8_t *mac, void *data) {
|
||||
struct mip_spi *s = (struct mip_spi *) data;
|
||||
s->end(s->spi);
|
||||
w5500_w1(s, W5500_CR, 0, 0x80); // Reset chip: CR -> 0x80
|
||||
w5500_w1(s, W5500_CR, 0x2e, 0); // CR PHYCFGR -> reset
|
||||
w5500_w1(s, W5500_CR, 0x2e, 0xf8); // CR PHYCFGR -> set
|
||||
// w5500_wn(s, W5500_CR, 9, s->mac, 6); // Set source MAC
|
||||
w5500_w1(s, W5500_S0, 0x1e, 16); // Sock0 RX buf size
|
||||
w5500_w1(s, W5500_S0, 0x1f, 16); // Sock0 TX buf size
|
||||
w5500_w1(s, W5500_S0, 0, 4); // Sock0 MR -> MACRAW
|
||||
w5500_w1(s, W5500_S0, 1, 1); // Sock0 CR -> OPEN
|
||||
return w5500_r1(s, W5500_S0, 3) == 0x42; // Sock0 SR == MACRAW
|
||||
(void) mac;
|
||||
}
|
||||
|
||||
static bool w5500_up(void *data) {
|
||||
uint8_t phycfgr = w5500_r1((struct mip_spi *) data, W5500_CR, 0x2e);
|
||||
return phycfgr & 1; // Bit 0 of PHYCFGR is LNK (0 - down, 1 - up)
|
||||
}
|
||||
|
||||
struct mip_driver mip_driver_w5500 = {
|
||||
.init = w5500_init, .tx = w5500_tx, .rx = w5500_rx, .up = w5500_up};
|
||||
#endif
|
||||
|
||||
#ifdef MG_ENABLE_LINES
|
||||
#line 1 "mip/mip.c"
|
||||
#endif
|
||||
@ -6114,7 +6222,7 @@ struct mip_driver mip_driver_stm32 = {.init = mip_driver_stm32_init,
|
||||
|
||||
#if MG_ENABLE_MIP
|
||||
|
||||
#if defined(_MSC_VER)
|
||||
#if defined(_MSC_VER) || defined(ARDUINO)
|
||||
#define _Atomic
|
||||
#else
|
||||
#include <stdatomic.h>
|
||||
@ -6825,23 +6933,26 @@ static void on_rx(void *buf, size_t len, void *userdata) {
|
||||
|
||||
void mip_init(struct mg_mgr *mgr, struct mip_cfg *ipcfg,
|
||||
struct mip_driver *driver, void *driver_data) {
|
||||
size_t maxpktsize = 1500, qlen = driver->setrx ? 1024 * 16 : 0;
|
||||
struct mip_if *ifp =
|
||||
(struct mip_if *) calloc(1, sizeof(*ifp) + 2 * maxpktsize + qlen);
|
||||
memcpy(ifp->mac, ipcfg->mac, sizeof(ifp->mac));
|
||||
ifp->use_dhcp = ipcfg->ip == 0;
|
||||
ifp->ip = ipcfg->ip, ifp->mask = ipcfg->mask, ifp->gw = ipcfg->gw;
|
||||
ifp->rx.buf = (uint8_t *) (ifp + 1), ifp->rx.len = maxpktsize;
|
||||
ifp->tx.buf = ifp->rx.buf + maxpktsize, ifp->tx.len = maxpktsize;
|
||||
ifp->driver = driver;
|
||||
ifp->driver_data = driver_data;
|
||||
ifp->mgr = mgr;
|
||||
ifp->queue.buf = ifp->tx.buf + maxpktsize;
|
||||
ifp->queue.len = qlen;
|
||||
if (driver->init) driver->init(ipcfg->mac, driver_data);
|
||||
if (driver->setrx) driver->setrx(on_rx, ifp);
|
||||
mgr->priv = ifp;
|
||||
mgr->extraconnsize = sizeof(struct tcpstate);
|
||||
if (driver->init && !driver->init(ipcfg->mac, driver_data)) {
|
||||
MG_ERROR(("ERROR intialising driver"));
|
||||
} else {
|
||||
size_t maxpktsize = 1500, qlen = driver->setrx ? 1024 * 16 : 0;
|
||||
struct mip_if *ifp =
|
||||
(struct mip_if *) calloc(1, sizeof(*ifp) + 2 * maxpktsize + qlen);
|
||||
memcpy(ifp->mac, ipcfg->mac, sizeof(ifp->mac));
|
||||
ifp->use_dhcp = ipcfg->ip == 0;
|
||||
ifp->ip = ipcfg->ip, ifp->mask = ipcfg->mask, ifp->gw = ipcfg->gw;
|
||||
ifp->rx.buf = (uint8_t *) (ifp + 1), ifp->rx.len = maxpktsize;
|
||||
ifp->tx.buf = ifp->rx.buf + maxpktsize, ifp->tx.len = maxpktsize;
|
||||
ifp->driver = driver;
|
||||
ifp->driver_data = driver_data;
|
||||
ifp->mgr = mgr;
|
||||
ifp->queue.buf = ifp->tx.buf + maxpktsize;
|
||||
ifp->queue.len = qlen;
|
||||
if (driver->setrx) driver->setrx(on_rx, ifp);
|
||||
mgr->priv = ifp;
|
||||
mgr->extraconnsize = sizeof(struct tcpstate);
|
||||
}
|
||||
}
|
||||
|
||||
int mg_mkpipe(struct mg_mgr *m, mg_event_handler_t fn, void *d, bool udp) {
|
||||
|
||||
@ -1423,7 +1423,7 @@ void mg_rpc_list(struct mg_rpc_req *r);
|
||||
|
||||
|
||||
struct mip_driver {
|
||||
void (*init)(uint8_t *mac, void *data); // Initialise driver
|
||||
bool (*init)(uint8_t *mac, void *data); // Initialise driver
|
||||
size_t (*tx)(const void *, size_t, void *data); // Transmit frame
|
||||
size_t (*rx)(void *buf, size_t len, void *data); // Receive frame (polling)
|
||||
bool (*up)(void *data); // Up/down status
|
||||
@ -1440,13 +1440,14 @@ void mip_init(struct mg_mgr *, struct mip_cfg *, struct mip_driver *, void *);
|
||||
|
||||
extern struct mip_driver mip_driver_stm32;
|
||||
extern struct mip_driver mip_driver_enc28j60;
|
||||
extern struct mip_driver mip_driver_w5500;
|
||||
|
||||
// Drivers that require SPI, can use this SPI abstraction
|
||||
struct mip_spi {
|
||||
void *spi; // Opaque SPI bus descriptor
|
||||
uint8_t (*txn)(void *, uint8_t); // SPI transaction: write 1 byte, read reply
|
||||
void (*begin)(void *); // SPI begin: slave select low
|
||||
void (*end)(void *); // SPI end: slave select high
|
||||
uint8_t (*txn)(void *, uint8_t); // SPI transaction: write 1 byte, read reply
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
@ -121,6 +121,8 @@ uint64_t mg_millis(void) {
|
||||
clock_gettime(CLOCK_REALTIME, &ts);
|
||||
#endif
|
||||
return ((uint64_t) ts.tv_sec * 1000 + (uint64_t) ts.tv_nsec / 1000000);
|
||||
#elif defined(ARDUINO)
|
||||
return (uint64_t) millis();
|
||||
#else
|
||||
return (uint64_t) (time(NULL) * 1000);
|
||||
#endif
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user