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Fix reading cycle count on non-msvc win-on-aarch64
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@ -223,6 +223,10 @@ uint64_t zmq::clock_t::rdtsc ()
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((13 & 15) << 3) | // crm
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((0 & 7) << 0)); // op2
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return _ReadStatusReg (pmccntr_el0);
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#elif (defined(_WIN32) && defined(__GNUC__) && defined(__aarch64__))
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uint64_t val;
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__asm__ volatile("mrs %0, pmccntr_el0" : "=r"(val));
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return val;
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#elif (defined __GNUC__ && (defined __i386__ || defined __x86_64__))
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uint32_t low, high;
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__asm__ volatile("rdtsc" : "=a"(low), "=d"(high));
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