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4f5dd67229
Only RV64GC is supported. Bug: fuchsia:127655 Tested: `python build/run_tests.py` on RISC-V emulator Tested: Created minidump via self-induced crash on RISC-V emulator, ran through Breakpad stackwalker Change-Id: I713797cd623b0a758269048e01696cbce502ca6c Reviewed-on: https://chromium-review.googlesource.com/c/crashpad/crashpad/+/4581050 Reviewed-by: Joshua Peraza <jperaza@chromium.org>
62 lines
1.8 KiB
C++
62 lines
1.8 KiB
C++
// Copyright 2017 The Crashpad Authors
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "test/linux/get_tls.h"
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#include "build/build_config.h"
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#include "util/misc/from_pointer_cast.h"
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namespace crashpad {
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namespace test {
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LinuxVMAddress GetTLS() {
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LinuxVMAddress tls;
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#if defined(ARCH_CPU_ARMEL)
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// 0xffff0fe0 is the address of the kernel user helper __kuser_get_tls().
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auto kuser_get_tls = reinterpret_cast<void* (*)()>(0xffff0fe0);
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tls = FromPointerCast<LinuxVMAddress>(kuser_get_tls());
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#elif defined(ARCH_CPU_ARM64)
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// Linux/aarch64 places the tls address in system register tpidr_el0.
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asm("mrs %0, tpidr_el0" : "=r"(tls));
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#elif defined(ARCH_CPU_X86)
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uint32_t tls_32;
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asm("movl %%gs:0x0, %0" : "=r"(tls_32));
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tls = tls_32;
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#elif defined(ARCH_CPU_X86_64)
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asm("movq %%fs:0x0, %0" : "=r"(tls));
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#elif defined(ARCH_CPU_MIPSEL)
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uint32_t tls_32;
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asm("rdhwr $3,$29\n\t"
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"move %0,$3\n\t"
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: "=r"(tls_32)
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:
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: "$3");
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tls = tls_32;
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#elif defined(ARCH_CPU_MIPS64EL)
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asm("rdhwr $3,$29\n\t"
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"move %0,$3\n\t"
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: "=r"(tls)
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:
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: "$3");
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#elif defined(ARCH_CPU_RISCV64)
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asm("mv %0, tp" : "=r"(tls));
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#else
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#error Port.
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#endif // ARCH_CPU_ARMEL
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return tls;
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}
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} // namespace test
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} // namespace crashpad
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