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This lays groundwork for floating point registers to also be included in RISC-V CPU context. Bug: fuchsia:5496 Tested: `fx test crashpad` Change-Id: I6230f146f955ac27f053f670f7f45dfff3560d02 Reviewed-on: https://chromium-review.googlesource.com/c/crashpad/crashpad/+/4594586 Reviewed-by: Mark Mentovai <mark@chromium.org>