mirror of
https://github.com/chromium/crashpad.git
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4f5dd67229
Only RV64GC is supported. Bug: fuchsia:127655 Tested: `python build/run_tests.py` on RISC-V emulator Tested: Created minidump via self-induced crash on RISC-V emulator, ran through Breakpad stackwalker Change-Id: I713797cd623b0a758269048e01696cbce502ca6c Reviewed-on: https://chromium-review.googlesource.com/c/crashpad/crashpad/+/4581050 Reviewed-by: Joshua Peraza <jperaza@chromium.org>
514 lines
19 KiB
ArmAsm
514 lines
19 KiB
ArmAsm
// Copyright 2018 The Crashpad Authors
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "util/misc/arm64_pac_bti.S"
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// namespace crashpad {
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// void CaptureContext(ucontext_t* context);
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// } // namespace crashpad
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// The type name for a ucontext_t varies by libc implementation and version.
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// Bionic and glibc 2.25 typedef ucontext_t from struct ucontext. glibc 2.26+
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// typedef ucontext_t from struct ucontext_t. Alias the symbol names to maintain
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// compatibility with both possibilities.
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#define CAPTURECONTEXT_SYMBOL _ZN8crashpad14CaptureContextEP10ucontext_t
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#define CAPTURECONTEXT_SYMBOL2 _ZN8crashpad14CaptureContextEP8ucontext
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.text
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.globl CAPTURECONTEXT_SYMBOL
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.globl CAPTURECONTEXT_SYMBOL2
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#if defined(__i386__) || defined(__x86_64__)
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.balign 16, 0x90
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#elif defined(__arm__) || defined(__aarch64__)
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.balign 4, 0x0
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.type CAPTURECONTEXT_SYMBOL, %function
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.type CAPTURECONTEXT_SYMBOL2, %function
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#elif defined(__mips__)
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.balign 4, 0x0
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#elif defined(__riscv)
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.balign 4, 0x0
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#endif
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CAPTURECONTEXT_SYMBOL:
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CAPTURECONTEXT_SYMBOL2:
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CRASHPAD_AARCH64_VALID_CALL_TARGET
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#if defined(__i386__)
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.cfi_startproc
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pushl %ebp
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.cfi_def_cfa_offset 8
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.cfi_offset %ebp, -8
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movl %esp, %ebp
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.cfi_def_cfa_register %ebp
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// Note that 16-byte stack alignment is not maintained because this function
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// does not call out to any other.
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// pushfl first, because some instructions (but probably none used here)
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// affect %eflags. %eflags will be in -4(%ebp).
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pushfl
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// Save the original value of %eax, and use %eax to hold the ucontext_t*
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// argument. The original value of %eax will be in -8(%ebp).
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pushl %eax
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movl 8(%ebp), %eax
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// Save the original value of %ecx, and use %ecx as a scratch register.
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pushl %ecx
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// The segment registers are 16 bits wide, but mcontext_t declares them
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// as unsigned 32-bit values, so zero the top half.
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xorl %ecx, %ecx
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movw %gs, %cx
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movl %ecx, 0x14(%eax) // context->uc_mcontext.xgs
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movw %fs, %cx
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movl %ecx, 0x18(%eax) // context->uc_mcontext.xfs
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movw %es, %cx
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movl %ecx, 0x1c(%eax) // context->uc_mcontext.xes
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movw %ds, %cx
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movl %ecx, 0x20(%eax) // context->uc_mcontext.xds
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// General-purpose registers whose values haven’t changed can be captured
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// directly.
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movl %edi, 0x24(%eax) // context->uc_mcontext.edi
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movl %esi, 0x28(%eax) // context->uc_mcontext.esi
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// The original %ebp was saved on the stack in this function’s prologue.
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movl (%ebp), %ecx
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movl %ecx, 0x2c(%eax) // context->uc_mcontext.ebp
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// %esp was saved in %ebp in this function’s prologue, but the caller’s %esp
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// is 8 more than this value: 4 for the original %ebp saved on the stack in
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// this function’s prologue, and 4 for the return address saved on the stack
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// by the call instruction that reached this function.
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leal 8(%ebp), %ecx
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movl %ecx, 0x30(%eax) // context->uc_mcontext.esp
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// More general-purpose registers
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movl %ebx, 0x34(%eax) // context->uc_mcontext.ebx
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movl %edx, 0x38(%eax) // context->uc_mcontext.edx
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// The original %ecx was saved on the stack above.
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movl -12(%ebp), %ecx
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movl %ecx, 0x3c(%eax) // context->uc_mcontext.ecx
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// The original %eax was saved on the stack above.
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movl -8(%ebp), %ecx
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movl %ecx, 0x40(%eax) // context->uc_mcontext.eax
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// trapno and err are unused so zero them out.
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xorl %ecx, %ecx
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movl %ecx, 0x44(%eax) // context->uc_mcontext.trapno
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movl %ecx, 0x48(%eax) // context->uc_mcontext.err
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// %eip can’t be accessed directly, but the return address saved on the stack
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// by the call instruction that reached this function can be used.
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movl 4(%ebp), %ecx
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movl %ecx, 0x4c(%eax) // context->uc_mcontext.eip
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// More segment registers
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xorl %ecx, %ecx
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movw %cs, %cx
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movl %ecx, 0x50(%eax) // context->uc_mcontext.xcs
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// The original %eflags was saved on the stack above.
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movl -4(%ebp), %ecx
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movl %ecx, 0x54(%eax) // context->uc_mcontext.eflags
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// uesp is unused so zero it out.
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xorl %ecx, %ecx
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movl %ecx, 0x58(%eax) // context->uc_mcontext.uesp
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// The last segment register.
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movw %ss, %cx
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movl %ecx, 0x5c(%eax) // context->uc_mcontext.xss
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// TODO(jperaza): save floating-point registers.
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xorl %ecx, %ecx
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movl %ecx, 0x60(%eax) // context->uc_mcontext.fpregs
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// Clean up by restoring clobbered registers, even those considered volatile
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// by the ABI, so that the captured context represents the state at this
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// function’s exit.
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popl %ecx
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popl %eax
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popfl
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popl %ebp
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ret
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.cfi_endproc
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#elif defined(__x86_64__)
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.cfi_startproc
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pushq %rbp
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.cfi_def_cfa_offset 16
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.cfi_offset %rbp, -16
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movq %rsp, %rbp
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.cfi_def_cfa_register %rbp
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// Note that 16-byte stack alignment is not maintained because this function
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// does not call out to any other.
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// pushfq first, because some instructions (but probably none used here)
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// affect %rflags. %rflags will be in -8(%rbp).
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pushfq
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// General-purpose registers whose values haven’t changed can be captured
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// directly.
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movq %r8, 0x28(%rdi) // context->uc_mcontext.r8
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movq %r9, 0x30(%rdi) // context->uc_mcontext.r9
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movq %r10, 0x38(%rdi) // context->uc_mcontext.r10
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movq %r11, 0x40(%rdi) // context->uc_mcontext.r11
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movq %r12, 0x48(%rdi) // context->uc_mcontext.r12
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movq %r13, 0x50(%rdi) // context->uc_mcontext.r13
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movq %r14, 0x58(%rdi) // context->uc_mcontext.r14
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movq %r15, 0x60(%rdi) // context->uc_mcontext.r15
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// Because of the calling convention, there’s no way to recover the value of
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// the caller’s %rdi as it existed prior to calling this function. This
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// function captures a snapshot of the register state at its return, which
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// involves %rdi containing a pointer to its first argument. Callers that
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// require the value of %rdi prior to calling this function should obtain it
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// separately. For example:
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// uint64_t rdi;
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// asm("movq %%rdi, %0" : "=m"(rdi));
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movq %rdi, 0x68(%rdi) // context->uc_mcontext.rdi
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movq %rsi, 0x70(%rdi) // context->uc_mcontext.rsi
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// Use %r8 as a scratch register now that it has been saved.
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// The original %rbp was saved on the stack in this function’s prologue.
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movq (%rbp), %r8
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movq %r8, 0x78(%rdi) // context->uc_mcontext.rbp
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// Save the remaining general-purpose registers.
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movq %rbx, 0x80(%rdi) // context->uc_mcontext.rbx
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movq %rdx, 0x88(%rdi) // context->uc_mcontext.rdx
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movq %rax, 0x90(%rdi) // context->uc_mcontext.rax
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movq %rcx, 0x98(%rdi) // context->uc_mcontext.rcx
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// %rsp was saved in %rbp in this function’s prologue, but the caller’s %rsp
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// is 16 more than this value: 8 for the original %rbp saved on the stack in
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// this function’s prologue, and 8 for the return address saved on the stack
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// by the call instruction that reached this function.
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leaq 16(%rbp), %r8
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movq %r8, 0xa0(%rdi) // context->uc_mcontext.rsp
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// %rip can’t be accessed directly, but the return address saved on the stack
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// by the call instruction that reached this function can be used.
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movq 8(%rbp), %r8
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movq %r8, 0xa8(%rdi) // context->uc_mcontext.rip
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// The original %rflags was saved on the stack above.
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movq -8(%rbp), %r8
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movq %r8, 0xb0(%rdi) // context->uc_mcontext.eflags
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// Save the segment registers
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movw %cs, 0xb8(%rdi) // context->uc_mcontext.cs
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movw %gs, 0xba(%rdi) // context->uc_mcontext.gs
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movw %fs, 0xbc(%rdi) // context->uc_mcontext.fs
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xorw %ax, %ax
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movw %ax, 0xbe(%rdi) // context->uc_mcontext.padding
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// Zero out the remainder of the unused pseudo-registers
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xorq %r8, %r8
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movq %r8, 0xc0(%rdi) // context->uc_mcontext.err
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movq %r8, 0xc8(%rdi) // context->uc_mcontext.trapno
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movq %r8, 0xd0(%rdi) // context->uc_mcontext.oldmask
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movq %r8, 0xd8(%rdi) // context->uc_mcontext.cr2
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// TODO(jperaza): save floating-point registers.
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movq %r8, 0xe0(%rdi) // context->uc_mcontext.fpregs
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// Clean up by restoring clobbered registers, even those considered volatile
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// by the ABI, so that the captured context represents the state at this
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// function’s exit.
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movq 0x90(%rdi), %rax
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movq 0x28(%rdi), %r8
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popfq
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popq %rbp
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ret
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.cfi_endproc
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#elif defined(__arm__)
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// The original r0 can't be recovered.
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str r0, [r0, #0x20]
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// Now advance r0 to point to the register array.
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add r0, r0, #0x24
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// Save registers r1-r12 at context->uc_mcontext.regs[i].
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stm r0, {r1-r12}
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// Restore r0.
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sub r0, r0, #0x24
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// Save SP/r13.
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str SP, [r0, #0x54] // context->uc_mcontext.sp
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// The original LR can't be recovered.
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str LR, [r0, #0x58] // context->uc_mcontext.lr
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// The link register holds the return address for this function.
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str LR, [r0, #0x5c] // context->uc_mcontext.pc
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// Use r1 as a scratch register.
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// CPSR is a deprecated synonym for APSR.
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mrs r1, APSR
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str r1, [r0, #0x60] // context->uc_mcontext.cpsr
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// Zero out unused fields.
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mov r1, #0x0
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str r1, [r0, #0x14] // context->uc_mcontext.trap_no
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str r1, [r0, #0x18] // context->uc_mcontext.error_code
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str r1, [r0, #0x1c] // context->uc_mcontext.oldmask
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str r1, [r0, #0x64] // context->uc_mcontext.fault_address
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// Restore r1.
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ldr r1, [r0, #0x24]
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// TODO(https://crashpad.chromium.org/bug/300): save floating-point registers.
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mov PC, LR
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#elif defined(__aarch64__)
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// Zero out fault_address, which is unused.
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str xzr, [x0, #0xb0] // context->uc_mcontext.fault_address
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// Save general purpose registers in context->uc_mcontext.regs[i].
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// The original x0 can't be recovered.
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stp x0, x1, [x0, #0xb8]
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stp x2, x3, [x0, #0xc8]
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stp x4, x5, [x0, #0xd8]
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stp x6, x7, [x0, #0xe8]
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stp x8, x9, [x0, #0xf8]
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stp x10, x11, [x0, #0x108]
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stp x12, x13, [x0, #0x118]
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stp x14, x15, [x0, #0x128]
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stp x16, x17, [x0, #0x138]
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stp x18, x19, [x0, #0x148]
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stp x20, x21, [x0, #0x158]
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stp x22, x23, [x0, #0x168]
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stp x24, x25, [x0, #0x178]
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stp x26, x27, [x0, #0x188]
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stp x28, x29, [x0, #0x198]
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// The original LR can't be recovered, therefore no need to sign x30 with PAC.
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str x30, [x0, #0x1a8]
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// Use x1 as a scratch register.
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mov x1, SP
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str x1, [x0, #0x1b0] // context->uc_mcontext.sp
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// The link register holds the return address for this function and won't be
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// recovered, therefore no need to sign x30 with PAC.
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str x30, [x0, #0x1b8] // context->uc_mcontext.pc
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// pstate should hold SPSR but NZCV are the only bits we know about.
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mrs x1, NZCV
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str x1, [x0, #0x1c0] // context->uc_mcontext.pstate
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// Restore x1 from the saved context.
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ldr x1, [x0, #0xc0]
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// TODO(https://crashpad.chromium.org/bug/300): save floating-point registers.
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ret
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#elif defined(__mips__)
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.set noat
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#if _MIPS_SIM == _ABIO32
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#define STORE sw
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#define MCONTEXT_FPREG_SIZE 4
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#define MCONTEXT_PC_OFFSET 32
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#else
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#define STORE sd
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#define MCONTEXT_FPREG_SIZE 8
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#define MCONTEXT_PC_OFFSET 616
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#endif
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#define MCONTEXT_REG_SIZE 8
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#define MCONTEXT_GREGS_OFFSET 40
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#define MCONTEXT_FPREGS_OFFSET 296
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// Value of register 0 is always 0.
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// Registers 26 and 27 are reserved for kernel, and shouldn't be used.
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STORE $1, (1 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $2, (2 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $3, (3 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $4, (4 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $5, (5 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $6, (6 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $7, (7 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $8, (8 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $9, (9 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $10, (10 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $11, (11 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $12, (12 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $13, (13 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $14, (14 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $15, (15 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $16, (16 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $17, (17 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $18, (18 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $19, (19 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $20, (20 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $21, (21 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $22, (22 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $23, (23 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $24, (24 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $25, (25 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $28, (28 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $29, (29 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $30, (30 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $31, (31 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)($a0)
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STORE $31, (MCONTEXT_PC_OFFSET)($a0)
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#ifdef __mips_hard_float
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s.d $f0, (0 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
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s.d $f2, (2 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
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s.d $f4, (4 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
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s.d $f6, (6 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
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s.d $f8, (8 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
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s.d $f10, (10 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
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s.d $f12, (12 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
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s.d $f14, (14 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f16, (16 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f18, (18 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f20, (20 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f22, (22 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f24, (24 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f26, (26 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f28, (28 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f30, (30 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
#if _MIPS_SIM != _ABIO32
|
||
s.d $f1, (1 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f3, (3 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f5, (5 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f7, (7 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f9, (9 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f11, (11 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f13, (13 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f15, (15 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f17, (17 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f19, (19 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f21, (21 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f23, (23 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f25, (25 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f27, (27 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f29, (29 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
s.d $f31, (31 * MCONTEXT_FPREG_SIZE + MCONTEXT_FPREGS_OFFSET)($a0)
|
||
#endif // _MIPS_SIM != _ABIO32
|
||
#endif // __mips_hard_float
|
||
|
||
jr $ra
|
||
|
||
.set at
|
||
|
||
#elif defined(__riscv)
|
||
|
||
#define MCONTEXT_GREGS_OFFSET 176
|
||
|
||
// x1/ra is the return address. Store it as the pc.
|
||
// The original x10/a0 can't be recovered.
|
||
sd x1, (0 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x1, (1 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x2, (2 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x3, (3 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x4, (4 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x5, (5 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x6, (6 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x7, (7 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x8, (8 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x9, (9 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x10, (10 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x11, (11 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x12, (12 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x13, (13 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x14, (14 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x15, (15 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x16, (16 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x17, (17 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x18, (18 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x19, (19 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x20, (20 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x21, (21 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x22, (22 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x23, (23 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x24, (24 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x25, (25 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x26, (26 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x27, (27 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x28, (28 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x29, (29 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x30, (30 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
sd x31, (31 * 8 + MCONTEXT_GREGS_OFFSET)(a0)
|
||
|
||
#define MCONTEXT_FPREGS_OFFSET MCONTEXT_GREGS_OFFSET + 32*8
|
||
|
||
// Use x31/t6 as scratch register.
|
||
frcsr x31
|
||
sw x31, (32 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
|
||
fsd f0, (0 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f1, (1 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f2, (2 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f3, (3 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f4, (4 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f5, (5 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f6, (6 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f7, (7 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f8, (8 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f9, (9 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f10, (10 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f11, (11 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f12, (12 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f13, (13 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f14, (14 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f15, (15 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f16, (16 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f17, (17 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f18, (18 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f19, (19 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f20, (20 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f21, (21 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f22, (22 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f23, (23 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f24, (24 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f25, (25 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f26, (26 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f27, (27 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f28, (28 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f29, (29 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f30, (30 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
fsd f31, (31 * 8 + MCONTEXT_FPREGS_OFFSET)(a0)
|
||
|
||
ret
|
||
|
||
#endif // __i386__
|