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<li class="navelem"><a class="el" href="namespacecrashpad.html">crashpad</a></li><li class="navelem"><a class="el" href="structcrashpad_1_1CPUContextX86__64.html">CPUContextX86_64</a></li><li class="navelem"><a class="el" href="structcrashpad_1_1CPUContextX86__64_1_1Fxsave.html">Fxsave</a></li> </ul>
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<a href="#pub-attribs">Public Attributes</a> |
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<div class="title">crashpad::CPUContextX86_64::Fxsave Struct Reference</div> </div>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
Public Attributes</h2></td></tr>
<tr class="memitem:a5aaf323cc0e11df986ea0d2b749c115a"><td class="memItemLeft" align="right" valign="top"><a id="a5aaf323cc0e11df986ea0d2b749c115a"></a>
uint16_t </td><td class="memItemRight" valign="bottom"><b>fcw</b></td></tr>
<tr class="separator:a5aaf323cc0e11df986ea0d2b749c115a"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:aecec6a596692a9660a3fdf4f059fdff4"><td class="memItemLeft" align="right" valign="top"><a id="aecec6a596692a9660a3fdf4f059fdff4"></a>
uint16_t </td><td class="memItemRight" valign="bottom"><b>fsw</b></td></tr>
<tr class="separator:aecec6a596692a9660a3fdf4f059fdff4"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a2d19122bf7e3d118d67b0912ffeda9dd"><td class="memItemLeft" align="right" valign="top"><a id="a2d19122bf7e3d118d67b0912ffeda9dd"></a>
uint8_t </td><td class="memItemRight" valign="bottom"><b>ftw</b></td></tr>
<tr class="separator:a2d19122bf7e3d118d67b0912ffeda9dd"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:aa4428166562807b80982acefe1197070"><td class="memItemLeft" align="right" valign="top"><a id="aa4428166562807b80982acefe1197070"></a>
uint8_t </td><td class="memItemRight" valign="bottom"><b>reserved_1</b></td></tr>
<tr class="separator:aa4428166562807b80982acefe1197070"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a3bf634693732a709ec6e9e2b17ff4c9c"><td class="memItemLeft" align="right" valign="top"><a id="a3bf634693732a709ec6e9e2b17ff4c9c"></a>
uint16_t </td><td class="memItemRight" valign="bottom"><b>fop</b></td></tr>
<tr class="separator:a3bf634693732a709ec6e9e2b17ff4c9c"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:acb886696585d4f806a116796ff08cc85"><td class="memItemLeft" ><a id="acb886696585d4f806a116796ff08cc85"></a>
union {</td></tr>
<tr class="memitem:a3a9dd1ea2c4df58841672e0a4565d331"><td class="memItemLeft" ><a id="a3a9dd1ea2c4df58841672e0a4565d331"></a>
   struct {</td></tr>
<tr class="memitem:a8c93c067a04432c48f1aac0f4a6e5fd0"><td class="memItemLeft" >
      uint32_t   <b>fpu_ip</b></td></tr>
<tr class="separator:a8c93c067a04432c48f1aac0f4a6e5fd0"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a6af287ae841f119ecc1215d1855fd897"><td class="memItemLeft" >
      uint16_t   <b>fpu_cs</b></td></tr>
<tr class="separator:a6af287ae841f119ecc1215d1855fd897"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a66a82cf5927689731ab1936261228908"><td class="memItemLeft" >
      uint16_t   <b>reserved_2</b></td></tr>
<tr class="separator:a66a82cf5927689731ab1936261228908"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a7eb7abbbc263590f29233f2e39feca4f"><td class="memItemLeft" >
      uint32_t   <b>fpu_dp</b></td></tr>
<tr class="separator:a7eb7abbbc263590f29233f2e39feca4f"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a5642661243d18878d4ffdf8e04269d15"><td class="memItemLeft" >
      uint16_t   <b>fpu_ds</b></td></tr>
<tr class="separator:a5642661243d18878d4ffdf8e04269d15"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a5f62958418d3316e2d997de77533b8d8"><td class="memItemLeft" >
      uint16_t   <b>reserved_3</b></td></tr>
<tr class="separator:a5f62958418d3316e2d997de77533b8d8"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a3a9dd1ea2c4df58841672e0a4565d331"><td class="memItemLeft" valign="top">   } </td><td class="memItemRight" valign="bottom"></td></tr>
<tr class="separator:a3a9dd1ea2c4df58841672e0a4565d331"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:acfb1690af0ac8385d19a5f1aa911a19f"><td class="memItemLeft" ><a id="acfb1690af0ac8385d19a5f1aa911a19f"></a>
   struct {</td></tr>
<tr class="memitem:ae1f8f03407f7a6671b2b93c175caf7c4"><td class="memItemLeft" >
      uint64_t   <b>fpu_ip_64</b></td></tr>
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<tr class="memitem:a716d3960f3bf60d613de119141e7a1ec"><td class="memItemLeft" >
      uint64_t   <b>fpu_dp_64</b></td></tr>
<tr class="separator:a716d3960f3bf60d613de119141e7a1ec"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:acfb1690af0ac8385d19a5f1aa911a19f"><td class="memItemLeft" valign="top">   } </td><td class="memItemRight" valign="bottom"></td></tr>
<tr class="separator:acfb1690af0ac8385d19a5f1aa911a19f"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:acb886696585d4f806a116796ff08cc85"><td class="memItemLeft" valign="top">}; </td><td class="memItemRight" valign="bottom"></td></tr>
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uint32_t </td><td class="memItemRight" valign="bottom"><b>mxcsr</b></td></tr>
<tr class="separator:a01d2bf9cf8eac7758268249cb164e534"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a553890b6f6315d8c52760b8c415a28ca"><td class="memItemLeft" align="right" valign="top"><a id="a553890b6f6315d8c52760b8c415a28ca"></a>
uint32_t </td><td class="memItemRight" valign="bottom"><b>mxcsr_mask</b></td></tr>
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<tr class="memitem:a2c60c07312e2346345c03bb5564edaaa"><td class="memItemLeft" align="right" valign="top"><a id="a2c60c07312e2346345c03bb5564edaaa"></a>
<a class="el" href="unioncrashpad_1_1CPUContextX86_1_1X87OrMMXRegister.html">X87OrMMXRegister</a> </td><td class="memItemRight" valign="bottom"><b>st_mm</b> [8]</td></tr>
<tr class="separator:a2c60c07312e2346345c03bb5564edaaa"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:aecfad53ccd5205ac87c9b90bfc37d086"><td class="memItemLeft" align="right" valign="top"><a id="aecfad53ccd5205ac87c9b90bfc37d086"></a>
XMMRegister </td><td class="memItemRight" valign="bottom"><b>xmm</b> [16]</td></tr>
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<tr class="memitem:a284c147d27f5ba88f1d8d4552b488da4"><td class="memItemLeft" align="right" valign="top"><a id="a284c147d27f5ba88f1d8d4552b488da4"></a>
uint8_t </td><td class="memItemRight" valign="bottom"><b>reserved_4</b> [48]</td></tr>
<tr class="separator:a284c147d27f5ba88f1d8d4552b488da4"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a2b621acd26edd01770ce886c8cc43000"><td class="memItemLeft" align="right" valign="top"><a id="a2b621acd26edd01770ce886c8cc43000"></a>
uint8_t </td><td class="memItemRight" valign="bottom"><b>available</b> [48]</td></tr>
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</table>
<hr/>The documentation for this struct was generated from the following file:<ul>
<li>snapshot/cpu_context.h</li>
</ul>
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