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Use the correct fxsave type for x86_64.

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No functional change.

TEST=snapshot_test SystemSnapshotMacTest.CPUX86SupportsDAZ
R=rsesek@chromium.org

Review URL: https://codereview.chromium.org/623343004
This commit is contained in:
Mark Mentovai 2014-10-06 13:47:10 -04:00
parent 0ff46a4e60
commit 56503fef86
2 changed files with 26 additions and 5 deletions
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27
snapshot/cpu_context.h
View File

@ -96,19 +96,36 @@ struct CPUContextX86_64 {
typedef CPUContextX86::X87OrMMXRegister X87OrMMXRegister; typedef CPUContextX86::X87OrMMXRegister X87OrMMXRegister;
typedef CPUContextX86::XMMRegister XMMRegister; typedef CPUContextX86::XMMRegister XMMRegister;
struct Fxsave64 { struct Fxsave {
uint16_t fcw; // FPU control word uint16_t fcw; // FPU control word
uint16_t fsw; // FPU status word uint16_t fsw; // FPU status word
uint8_t ftw; // abridged FPU tag word uint8_t ftw; // abridged FPU tag word
uint8_t reserved_1; uint8_t reserved_1;
uint16_t fop; // FPU opcode uint16_t fop; // FPU opcode
uint64_t fpu_ip; // FPU instruction pointer union {
uint64_t fpu_dp; // FPU data pointer // The expression of these union members is determined by the use of
// fxsave/fxrstor or fxsave64/fxrstor64 (fxsaveq/fxrstorq). Mac OS X and
// Windows systems use the traditional fxsave/fxrstor structure.
struct {
// fxsave/fxrstor
uint32_t fpu_ip; // FPU instruction pointer offset
uint16_t fpu_cs; // FPU instruction pointer segment selector
uint16_t reserved_2;
uint32_t fpu_dp; // FPU data pointer offset
uint16_t fpu_ds; // FPU data pointer segment selector
uint16_t reserved_3;
};
struct {
// fxsave64/fxrstor64 (fxsaveq/fxrstorq)
uint64_t fpu_ip_64; // FPU instruction pointer
uint64_t fpu_dp_64; // FPU data pointer
};
};
uint32_t mxcsr; // multimedia extensions status and control register uint32_t mxcsr; // multimedia extensions status and control register
uint32_t mxcsr_mask; // valid bits in mxcsr uint32_t mxcsr_mask; // valid bits in mxcsr
X87OrMMXRegister st_mm[8]; X87OrMMXRegister st_mm[8];
XMMRegister xmm[16]; XMMRegister xmm[16];
uint8_t reserved_2[48]; uint8_t reserved_4[48];
uint8_t available[48]; uint8_t available[48];
}; };
@ -136,7 +153,7 @@ struct CPUContextX86_64 {
uint16_t gs; uint16_t gs;
// Floating-point and vector registers. // Floating-point and vector registers.
Fxsave64 fxsave64; Fxsave fxsave;
// Debug registers. // Debug registers.
uint64_t dr0; uint64_t dr0;

4
snapshot/system_snapshot_mac.cc
View File

@ -270,7 +270,11 @@ bool SystemSnapshotMac::CPUX86SupportsDAZ() const {
} }
// Call fxsave. // Call fxsave.
#if defined(ARCH_CPU_X86)
CPUContextX86::Fxsave fxsave __attribute__((aligned(16))) = {}; CPUContextX86::Fxsave fxsave __attribute__((aligned(16))) = {};
#elif defined(ARCH_CPU_X86_64)
CPUContextX86_64::Fxsave fxsave __attribute__((aligned(16))) = {};
#endif
static_assert(sizeof(fxsave) == 512, "fxsave size"); static_assert(sizeof(fxsave) == 512, "fxsave size");
static_assert(offsetof(decltype(fxsave), mxcsr_mask) == 28, static_assert(offsetof(decltype(fxsave), mxcsr_mask) == 28,
"mxcsr_mask offset"); "mxcsr_mask offset");